Method and apparatus for deadlock prevention in a distributed shared memory system
View Patent ↗A distributed shared memory system having a memory access request transaction queue having a plurality of queue slots prevents occurrences of deadlocks. The distributed shared memory system is implemented in a networked multiprocessor computing system, and includes, in each coherency controller of each of the memories in the system, a mechanism to reserve at least one slot of the memory access request transaction queue for exclusive processing of processor return (PR) transactions to provide an uninterrupted processing of PR transactions. The number of blocking (BL) transaction is limited to a number less than available slots. The distributed shared memory system also includes a distributed memory return transaction queue that allows each of entries in the memory access request transaction queue to add a plurality of memory return transactions per clock cycle.
1. A method of preventing a deadlock in a distributed shared memory system comprising a memory access request transaction queue including a plurality of queue slots, the method comprising:
reserving one or more queue slots for exclusive processing of processor return flow control class transactions;
allowing a processor return flow control class transaction to be processed in the reserved one or more queue slots;
providing a blocking flow control class transaction threshold indicating a maximum number of blocking flow control class transactions allowed to be processed in the memory access request transaction queue; and
preventing the memory access request transaction queue from accepting any new blocking flow control class transaction if a current number of blocking flow control class transactions already in the memory access request transaction queue is not less than the blocking flow control class transaction threshold.
2. The method of preventing a deadlock in accordance with claim 1 , further comprising:
providing an entry threshold indicating a maximum number of entries allowed to be processed in the memory access request transaction queue; and
preventing the memory access request transaction queue from accepting any new entry if a current number of entries already in the memory access request transaction queue is not less than the entry threshold.
3. The method of preventing a deadlock in accordance with claim 2 , wherein:
each of the entry threshold and the blocking flow control class transaction threshold is configurable by at least one of a user of the distributed shared memory system and a system software; and
wherein the entry threshold and the blocking flow control class transaction threshold are each selected so that the blocking flow control class transaction threshold is less than the entry threshold.
4. An apparatus for preventing a deadlock in a distributed shared memory system comprising a memory access request transaction queue including a plurality of queue slots, the apparatus comprising:
a coherency controller configured to reserve one or more queue slots for exclusive processing of processor return flow control class transactions and to allow a processor return flow control class transaction to be processed in the reserved one or more queue slots;
a first register configured to store a blocking flow control class transaction threshold indicating a maximum number of blocking flow control class transactions allowed to be processed in the memory access request transaction queue; and
wherein the coherency controller is configured to prevent the memory access request transaction queue from accepting any new blocking flow control class transaction if a current number of blocking flow control class transactions already in the memory access request transaction queue is not less than the blocking flow control class transaction threshold.
5. The apparatus for preventing a deadlock according to claim 4 , further comprising:
a second register configured to store an entry threshold indicating a maximum number of entries allowed to be processed in the memory access request transaction queue; and
wherein the coherency controller is configured to prevent the memory access request transaction queue from accepting any new entry if a current number of entries already in the memory access request transaction queue is not less than the entry threshold.
6. The apparatus for preventing a deadlock according to claim 5 , wherein:
each of the entry threshold and the blocking flow control class transaction threshold is configurable by at least one of a user of the distributed shared memory system and a system software; and
wherein the entry threshold and the blocking flow control class transaction threshold are each selected so that the blocking flow control class transaction threshold is less than the entry threshold.