IP Library Granted Patent US 7,187,118
Granted Patent B2
US 7,187,118 · App. 10/685,477 · Granted Mar 6, 2007

Dual panel type organic electro luminescent display device and manufacturing method for the same

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Quick Facts
Patent No.
US 7,187,118
App. No.
10/685,477
Granted
Mar 6, 2007
Kind
B2
Abstract

An organic electroluminescent display (ELD) device includes first and second substrates having a plurality of sub-pixels defined thereon, the first and second substrates being spaced apart from and opposing each other, an array element layer on the first substrate, the array element layer having a plurality of thin film transistors corresponding to each sub-pixel, a first electrode on an inner side of the second substrate, an organic light-emitting layer beneath the first electrode, a second electrode corresponding to each sub-pixel beneath the organic light-emitting layer, a plurality of electrical connecting patterns corresponding to each sub-pixel between the array element layer and the second electrode, the electrical connecting pattern being formed of material having a plastic deformation property, and a seal pattern formed on one of the first and second substrates, wherein a height of the electrical connecting pattern is smaller than an original height of the electrical connecting pattern measured before an attachment of the first and second substrates.

Claims (36)

1. An organic electroluminescent display (ELD) device, comprising:

first and second substrates having a plurality of sub-pixels defined thereon, the first and second substrates being spaced apart from and opposing each other;

an array element layer on the first substrate, the array element layer having a plurality of thin film transistors corresponding to each sub-pixel;

a first electrode on an inner side of the second substrate;

an organic light-emitting layer beneath the first electrode;

a second electrode corresponding to each sub-pixel beneath the organic light-emitting layer;

a plurality of electrical connecting patterns corresponding to each sub-pixel between the array element layer and the second electrode, the electrical connecting pattern being formed of material having a plastic deformation property; and

a seal pattern formed on one of the first and second substrates,

wherein a height of the electrical connecting pattern is smaller than an original height of the electrical connecting pattern measured before an attachment of the first and second substrates.

2. The device according to claim 1 , wherein the height of the electrical connecting pattern is between 80˜95% of the original height of the electrical connecting pattern measured before the attachment of the first and second substrates.

3. The device according to claim 1 , wherein the electrical connecting pattern is formed of conductive organic material.

4. The device according to claim 1 , further comprising a protection electrode between the second electrode and the electrical connecting pattern, wherein the protection electrode has a pattern structure corresponding to the second electrode.

5. The device according to claim 4 , wherein the electrical connecting pattern is electrically connected to the second electrode via the protection electrode.

6. The device according to claim 5 , further comprising a connecting electrode on the array element layer, wherein the connecting electrode is connected to the thin film transistor.

7. The device according to claim 6 , wherein the electrical connecting pattern is electrically connected to the thin film transistor via the connecting electrode.

8. The device according to claim 7 , wherein the thin film transistor has a gate electrode, a source electrode and a drain electrode, and the connecting electrode is connected to the drain electrode.

9. The device according to claim 1 , further comprising a connecting electrode on the array element layer, wherein the connecting electrode is connected to the thin film transistor.

10. The device according to claim 9 , wherein the electrical connecting pattern is electrically connected to the thin film transistor via the connecting electrode.

11. The device according to claim 10 , wherein the thin film transistor has a gate electrode, a source electrode and a drain electrode, and the connecting electrode is connected to the drain electrode.

12. The device according to claim 1 , wherein the electrical connecting pattern is formed on the array element layer.

13. The device according to claim 1 , wherein the organic electroluminescent display (ELD) device is a top emission-type.

14. A method for manufacturing an organic electroluminescent display (ELD) device, comprising steps of:

forming an array element layer on a first substrate on which a plurality of sub-pixels are defined, the array element layer having a plurality of thin film transistors corresponding to each sub-pixel;

forming an electrical connecting pattern having a first height on the array element layer corresponding to each sub-pixel, the electrical connecting pattern being formed of material having a plastic deformation property;

forming an organic electroluminescent diode on a second substrate, the organic electroluminescent diode having first and second electrodes and an organic light-emitting layer between the first and second electrodes;

forming a seal pattern on one of the first and second substrates; and

attaching the first and second substrates together, wherein the first height of the electrical connecting pattern is reduced to a second height by applying a plastic deformation force to the electrical connecting pattern during the step of attaching the first and second substrates.

15. The method according to claim 14 , wherein the second height is between 80˜95% of the first height.

16. The method according to claim 14 , wherein the electrical connecting pattern is formed of conductive organic material.

17. The method according to claim 14 , further comprising a step of forming a connecting electrode corresponding to each sub-pixel on the array element layer after the step of forming the array element layer.

18. The method according to claim 17 , wherein the step of forming the array element layer includes forming the thin film transistor having a gate electrode, a source electrode and a drain electrode, wherein the connecting electrode is connected to the drain electrode.

19. The method according to claim 14 , further comprising a step of forming a protection electrode corresponding to each sub-pixel and having a pattern structure corresponding to the second electrode after the step of forming the organic electroluminescent diode.

20. The method according to claim 14 , further comprising a step of forming a connecting electrode corresponding to each sub-pixel on the array element layer after the step of forming the array element layer, and a step of forming a protection electrode corresponding to each sub-pixel and having a pattern structure corresponding to the second electrode after the step of forming the organic electroluminescent diode.

21. The method according to claim 20 , wherein the step of forming the array element layer includes forming the thin film transistor having a gate electrode, a source electrode and a drain electrode, wherein the connecting electrode is connected to the drain electrode.

22. The method according to claim 14 , wherein the thin film transistor is a driving thin film transistor.

23. The method according to claim 14 , wherein the organic electroluminescent display (ELD) device is a top emission-type.

Assignments (2)
CHANGE OF NAME Recorded Jun 19, 2008
From: LG.PHILIPS LCD CO., LTD.
To: LG DISPLAY CO., LTD.
Reel/Frame 021147/0009 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 16, 2003
From: PARK, JAE-YONG; LEE, NAM-YANG; SASTRA, BUDIMAN
To: LG.PHILIPS LCD CO., LTD.
Reel/Frame 014612/0610 →