IP Library Granted Patent US 7,139,177
Granted Patent B2
US 7,139,177 · App. 10/695,100 · Granted Nov 21, 2006

Printed circuit board with void between pins

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Quick Facts
Patent No.
US 7,139,177
App. No.
10/695,100
Granted
Nov 21, 2006
Kind
B2
Abstract

A circuit board includes at least one insulator layer and a plurality of conductors over which a plurality of signals is carried. A plurality of terminals is coupled to at least a subset of the plurality of conductors. A void is formed in the circuit board between at least two terminals.

Claims (36)

1. An article of manufacture, comprising:

a circuit board including at least one insulator layer and a plurality of conductors over which a plurality of signals is carried;

a plurality of terminals coupled to at least a subset of the plurality of conductors; and

a void formed in the circuit board between at least two terminals;

wherein the terminals include a plurality of holes formed in the circuit board, each hole being plated with a conductive ring that is coupled to at least one of the subset of the plurality conductors;

wherein the void is formed in the circuit board between at least two conductive rings; and

further comprising a connector mounted on the circuit board, the connector having a plurality of connector pins, wherein each of the plurality of connector pins is inserted into a respective one of the plurality of holes.

2. The article of manufacture of claim 1 , wherein the connector includes a plurality of sockets.

3. The article of manufacture of claim 1 , wherein the article of manufacture is a backplane.

4. The article of manufacture of claim 1 , wherein the circuit board comprises a multi-layer printed circuit bard.

5. A backplane comprising:

a printed circuit board having at least one insulator layer and a plurality of conductors over which a plurality of signals is carried;

wherein the printed circuit board includes:

a plurality of holes formed in the printed circuit board, each of the plurality of holes having a conductive plating coupled to at least one of the plurality of conductors; and

a void formed in the printed circuit board between at least two of the plurality of holes; and

wherein the printed circuit board further includes a connector mounted on the circuit board, the connector having a plurality of connector pins, wherein each of the plurality of connector pins is inserted into a respective one of the plurality of holes.

6. The backplane of claim 5 , wherein the conductive plating of at least one of the plurality of holes between which the void is formed is coupled to a TNV-3 circuit.

7. The backplane of claim 6 , wherein the TNV-3 circuit is coupled to a twisted-pair telephone line used to provision a digital subscriber line channel.

8. The backplane of claim 7 , wherein the digital subscriber line channel is a high-speed digital subscriber line channel.

9. The backplane of claim 5 , wherein the void has an oval shape.

10. The backplane of claim 5 , further comprising a direct current power input.

11. The backplane of claim 5 , farther comprising a filter.

12. A telecommunication system comprising:

a chassis having a plurality of slots;

a backplane inserted into the chassis; and

a plurality of cards, each card inserted into one of the plurality of slots;

wherein the backplane comprises:

a backplane circuit board that includes a plurality of backplane conductors over which a plurality of backplane signals is carried; and

a plurality of card interfaces, each card interface including a plurality of holes formed in the backplane circuit board, wherein each bole has a conductive plating coupled to at least one of the plurality of backplane conductors;

wherein each of the plurality of cards comprises:

a card circuit board that includes a plurality of card conductors over which a plurality of card signals is carried; and

a backplane interface that couples that card to one of the plurality of card interfaces of the backplane, wherein the backplane interface includes a plurality of pins and wherein each pin is coupled to at least one card conductor, and

wherein at least one of the card interfaces includes a void formed in the backplane circuit board between at least two of the plurality of holes included in that card interface.

13. The telecommunication system of claim 12 , wherein the conductive plating of at least one of the plurality of holes between which the void is formed is coupled to a TNV-3 circuit.

14. The telecommunication system of claim 13 , wherein the TNV-3 circuit is coupled to a twisted-pair telephone line used to provision a digital subscriber line channel.

15. The telecommunication system of claim 14 , wherein the digital subscriber line channel is a high-speed digital subscriber line channel.

Assignments (5)
RELEASE OF SECURITY INTEREST IN PATENTS (RELEASES RF 036718/0042) Recorded Mar 31, 2017
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: COMMSCOPE DSL SYSTEMS LLC (FORMERLY KNOWN AS ADC DSL SYSTEMS, INC.)
Reel/Frame 042126/0050 →
PATENT SECURITY AGREEMENT - TERM LOAN Recorded Sep 29, 2015
From: ADC DSL SYSTEMS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 036714/0808 →
PATENT SECURITY AGREEMENT - ABL Recorded Sep 29, 2015
From: ADC DSL SYSTEMS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 036715/0164 →
PATENT SECURITY AGREEMENT Recorded Sep 29, 2015
From: ADC DSL SYSTEMS, INC.
To: WILMINGTON TRUST, NATIONAL ASSOCIATION, AS THE COLLATERAL AGENT
Reel/Frame 036718/0042 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 3, 2003
From: GOTTLIEB, GARY
To: ADC DSL SYSTEMS, INC.
Reel/Frame 014755/0073 →