IP Library Granted Patent US 7,317,743
Granted Patent B2
US 7,317,743 · App. 10/695,342 · Granted Jan 8, 2008

Temperature and jitter compensation controller circuit and method for fiber optics device

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Quick Facts
Patent No.
US 7,317,743
App. No.
10/695,342
Granted
Jan 8, 2008
Kind
B2
Abstract

Systems and methods are provided for configuring an optoelectronic device so as to control various operating conditions at various temperatures. The method includes operating the optoelectronic device at a first temperature, adjusting a first control parameter of the optoelectronic device to satisfy a first operating requirement and recording an associated first value of the first control parameter. Further, the method includes operating the optoelectronic device at a second temperature, adjusting the first control parameter of the optoelectronic device to satisfy the first operating requirement, and recording an associated second value of the first control parameter. From the first and second recorded values of the first control parameter, a sequence of values for the first control parameter for a corresponding sequence of temperatures in a predefined range of temperatures is determined and stored in a programmable device within the device. In addition, one or more control parameters may be adjusted at each temperature to satisfy one or more operating requirements.

Claims (28)

1. A test and configuration system, comprising:

a temperature control device configured for thermal communication with one or more optoelectronic transceivers;

an optical signal analyzer configured and arranged to communicate with an optoelectronic transceiver that is thermally coupled with the temperature control device and receive at least one optical test output signal;

a host system configured for communication with the temperature control device, any optoelectronic transceivers that are thermally coupled with the temperature control device, and with the optical signal analyzer, wherein the optical signal analyzer is configured to transmit results of an analysis on the at least one optical test output signal to the host system and the host system is further configured to adjust one or more control parameters of the one or more optoelectronic transceivers, the host system comprising:

a central processing unit;

a user interface; and

a memory that is configured to communicate with the central processing unit and the user interface, where the memory stores:

an operating system;

control parameter setup procedures;

operational requirement settings; and

temperature compensation values;

a data bus configured to couple the host system with any optoelectronic transceivers thermally coupled with the temperature control device; and

a control bus configured to couple the host system with any optoelectronic transceivers thermally coupled with the temperature control device.

2. The test and configuration system as recited in claim 1 , wherein the data bus is configured to carry test data patterns.

3. The test and configuration system as recited in claim 1 , wherein the operating system stores instructions for one or more of: communicating; processing data; accessing data; storing data; and, searching data.

4. The test and configuration system as recited in claim 1 , wherein the memory additionally stores extinction ratio and optical power level setup procedures.

5. The test and configuration system as recited in claim 1 , wherein the control bus is configured to carry control parameters from the host computer to an optoelectronic transceiver under test.

6. The test and configuration system as recited in claim 1 , wherein the operational requirement settings include information concerning jitter minimization.

7. The test and configuration system as recited in claim 1 , wherein the temperature compensation values relate to the computation of temperature compensation and jitter minimization values at various temperatures.

8. The test and configuration system as recited in claim 1 , wherein the host computer is configured to control operation of the temperature control device and any optoelectronic transceivers under test.

9. The test and configuration system as recited in claim 1 , wherein the test and configuration system is configured to operate in connection with a plurality of optoelectronic transceivers simultaneously.

10. The test and configuration system as recited in claim 1 , wherein the control parameter setup procedures are concerned with testing and configuration of an optoelectronic transceiver.

11. The test and configuration system as recited in claim 1 , wherein the control parameter setup procedures are concerned with one or more of the following operating requirements: jitter minimization; optical output power; extinction ratio; crossing percentage; mask hits; mask margin; and, avalanche photodiode temperature compensation.

12. The test and configuration system as recited in claim 1 , wherein the host system is associated with a computer-readable storage medium that carries instructions executable by the host system for performing a method comprising:

while operating an optoelectronic device at a first temperature, adjusting a first control parameter to satisfy a first operating requirement, wherein the host system adjusts the first control parameter based on results of an analysis on a test optical signal received from an optical signal analyzer, and recording an associated first value of the first control parameter;

while operating the optoelectronic device at a second temperature, adjusting the first control parameter to satisfy the first operating requirement, and recording an associated second value of the first control parameter;

determining a sequence of values for the first control parameter for a corresponding sequence of temperatures in a predefined range of temperatures in accordance with the first and second recorded values of the first control parameter; and

storing a set of control values for the first control parameter into a programmable device within the optoelectronic device, the set comprising at least a subset of the determined sequence of values.

Assignments (5)
PATENT RELEASE AND REASSIGNMENT Recorded Jul 5, 2022
From: BANK OF AMERICA, N.A., AS ADMINISTRATIVE AGENT
To: II-VI INCORPORATED; MARLOW INDUSTRIES, INC.; EPIWORKS, INC.; LIGHTSMYTH TECHNOLOGIES, INC.; KAILIGHT PHOTONICS, INC.; COADNA PHOTONICS, INC.; OPTIUM CORPORATION; FINISAR CORPORATION; II-VI OPTICAL SYSTEMS, INC.; M CUBED TECHNOLOGIES, INC.; II-VI PHOTONICS (US), INC.; II-VI DELAWARE, INC.; II-VI OPTOELECTRONIC DEVICES, INC.; PHOTOP TECHNOLOGIES, INC.
Reel/Frame 060574/0001 →
SECURITY INTEREST Recorded Jul 1, 2022
From: II-VI INCORPORATED; II-VI DELAWARE, INC.; M CUBED TECHNOLOGIES, INC.; II-VI PHOTONICS (US), INC.; PHOTOP TECHNOLOGIES, INC.; COHERENT, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 060562/0254 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 1, 2020
From: FINISAR CORPORATION
To: II-VI DELAWARE, INC.
Reel/Frame 052286/0001 →
NOTICE OF GRANT OF SECURITY INTEREST IN PATENTS Recorded Sep 25, 2019
From: II-VI INCORPORATED; MARLOW INDUSTRIES, INC.; EPIWORKS, INC.; LIGHTSMYTH TECHNOLOGIES, INC.; KAILIGHT PHOTONICS, INC.; COADNA PHOTONICS, INC.; OPTIUM CORPORATION; FINISAR CORPORATION; II-VI OPTICAL SYSTEMS, INC.; M CUBED TECHNOLOGIES, INC.; II-VI PHOTONICS (US), INC.; II-VI DELAWARE, INC.; II-VI OPTOELECTRONIC DEVICES, INC.; PHOTOP TECHNOLOGIES, INC.
To: BANK OF AMERICA, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 050484/0204 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 28, 2003
From: HOFMEISTER, RULDOLF J.; BENCH, SAMANTHA R.; BANNIKOV, DMITRI
To: FINISAR CORPORATION
Reel/Frame 014654/0027 →