Semiconductor device and method of manufacturing the same
View Patent ↗A semiconductor device has a ferroelectric capacitor. The semiconductor device includes an interlayer insulating layer, a ferroelectric capacitor and an insulating side wall film. The interlayer insulating layer is formed on a substrate including an integrated circuit and has a contact hole exposing a part of the integrated circuit. The ferroelectric capacitor is formed by depositing a first electrode layer, a ferroelectric layer and a second electrode layer on the interlayer insulating layer in this order. The insulating side wall film covers a peripheral edge section of the ferroelectric capacitor and is spaced from a peripheral edge section of the contact hole. A wiring layer electrically connects the second electrode layer to the integrated circuit through the contact hole.
1. A semiconductor device comprising:
a substrate including an integrated circuit;
an interlayer insulating layer formed on said substrate, said interlayer insulating layer having a contact hole;
a ferroelectric capacitor formed by a first electrode layer, a ferroelectric layer and a second electrode layer deposited on said interlayer insulating layer in this order;
a wiring layer electrically connecting said second electrode layer of said ferroelectric capacitor to said integrated circuit through said contact hole in said interlayer insulating layer; and
an insulating side wall film covering a peripheral section of said ferroelectric capacitor and electrically insulating said peripheral section of said ferroelectric capacitor from said wiring layer, and being spaced from a peripheral edge section of said contact hole.
2. The semiconductor device according to the claim 1 , wherein said insulating side wall film includes a hydrogen diffusion preventing layer.
3. The semiconductor device according to the claim 1 , wherein said ferroelectric layer comprises bismuth strontium tantalate.
4. The semiconductor device according to claim 1 , wherein at least a portion of said wiring layer is deposited on said insulating side wall film.
5. The semiconductor device according to claim 1 , wherein an upper surface of said second electrode layer is free of said insulating side wall film.
6. The semiconductor device according to the claim 1 , wherein said wiring layer includes a contact plug within said contact hole.
7. The semiconductor device according to the claim 6 , wherein said interlayer insulating layer includes a plug oxidation protective film comprising silicon nitride—and silicon oxide—, and said ferroelectric capacitor is mounted on said interlayer insulating layer.