IP Library Granted Patent US 7,072,132
Granted Patent B2
US 7,072,132 · App. 10/706,393 · Granted Jul 4, 2006

System and method for writing servo track in sealed HDD

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Quick Facts
Patent No.
US 7,072,132
App. No.
10/706,393
Granted
Jul 4, 2006
Kind
B2
Abstract

Write control bits are associated with servo pattern data bits to selectively disable or enable a write gate in a HDD write channel for self-servo writing after being sealed but before being vended to a user. The write gate can be disabled and enabled without deenergizing the write channel. A single write delay is calculated from one timing mark to the next to enable writing the next timing mark and portions of the radial pattern and servo pattern between the timing marks.

Claims (9)

1. A HDD comprising:

at least one write channel including at least one write gate; and

control circuitry controlling the write gate using write control bits to selectively enable writing data bits associated with a servo pattern onto at least one disk, wherein the control circuitry uses tow bits of a ten bit parallel bus as write control bits to indicate whether the write gate should enable writing one or more of the remaining eight bits of the bus to disk.

2. The HDD of claim 1 , wherein the control circuitry writes a servo pattern after the HDD has been sealed.

3. The HDD of claim 1 , wherein the write channel is used during operation to write user data to the disk.

4. The HDD of claim 3 , wherein the control circuitry uses a write delay to a next timing mark based on detecting a current timing mark, the time delay including a clock cycle component and a clock phase component, the write channel using the write delay to write the next timing mark and associated portions of the servo pattern to disk.

5. A HDD comprising:

at least one write channel including at least one write gate; and

control circuitry controlling the write gate using write control bits to selectively enable writing data bits associated with a servo pattern onto at least one disk, wherein the control circuitry uses four bits of an eight bit parallel bus as write control bits to indicate whether the write gate should enable writing one or more of the remaining four bits of the bus to disk.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 5, 2016
From: HGST NETHERLANDS B.V.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 040820/0802 →
CHANGE OF NAME Recorded Oct 25, 2012
From: HITACHI GLOBAL STORAGE TECHNOLOGIES NETHERLANDS B.V.
To: HGST NETHERLANDS B.V.
Reel/Frame 029341/0777 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 12, 2003
From: FLYNN, DAVID; HERBST, GARY
To: HITACHI GLOBAL STORAGE TECHNOLOGIES NETHERLANDS B.V.
Reel/Frame 014702/0133 →