Method of fabricating thin film transistor array
View Patent ↗A method of fabricating a thin film transistor array is provided. A first patterned conductive layer that distributes over an area range exceeding the designated display region is formed over a substrate. A first dielectric layer is formed over the substrate, wherein the first dielectric layer has the thickness getting smaller toward the edge, so that the first patterned conductive layer outside the designated display region is exposed. A second patterned conductive layer is formed over the first dielectric layer. The second patterned conductive layer and the exposed first patterned conductive layer are electrically connected. A second dielectric layer having a plurality of contact openings therein is formed over the substrate. A plurality of pixel electrodes is formed over the second dielectric layer such that the pixel electrode and the second patterned conductive layer are electrically connected through the contact openings. Finally, various layers outside the designated display regions are removed.
1. A thin film transistor array semi-finished product structure over a substrate having at least one designated display region, comprising:
a first patterned conductive layer over the substrate, wherein the first patterned conductive layer distributes over an area range that exceeds the designated display region;
a dielectric layer covering a portion of the first patterned conductive layer but exposing the first patterned conductive layer outside the designated display region; and
a second patterned conductive layer over the dielectric layer, wherein the second patterned conductive layer and the exposed first patterned conductive layer are electrically connected.
2. The structure of claim 1 , wherein the first patterned conductive layer includes a plurality of gates and a plurality of gate connected scan lines.
3. The structure of claim 1 , wherein material constituting the first patterned conductive layer includes a metallic substance.
4. The structure of claim 3 , wherein material constituting the first patterned conductive layer is selected from a group consisting of chromium and tantalum.
5. The structure of claim 1 , wherein material constituting the dielectric layer includes silicon nitride.
6. The structure of claim 1 , wherein material constituting the second patterned conductive layer includes a metallic substance.
7. The structure of claim 6 , wherein material constituting the second patterned conductive layer includes aluminum.