IP Library Granted Patent US 7,038,507
Granted Patent B2
US 7,038,507 · App. 10/713,717 · Granted May 2, 2006

Frequency synthesizer having PLL with an analog phase detector

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Quick Facts
Patent No.
US 7,038,507
App. No.
10/713,717
Granted
May 2, 2006
Kind
B2
Abstract

A frequency synthesizer is disclosed. According to one embodiment, the frequency synthesizer includes a phase locked loop (PLL) having an analog mixer phase detector and an auxiliary digital frequency detector coupled to the phase locked loop. The PLL may include a programmable divider having an input terminal responsive to an output signal of the frequency synthesizer and having an output terminal coupled to an input terminal of the analog mixer phase detector, a loop filter having an input terminal coupled to an output terminal of the analog mixer phase detector, and a voltage controlled oscillator having a control terminal coupled to an output terminal of the loop filter. The programmable divider may include a direct digital synthesizer.

Claims (31)

1. A frequency synthesizer, comprising:

a phase locked loop comprising:

an analog mixer phase detector;

a programmable divider having an input terminal responsive to an output signal of the frequency synthesizer and having an output terminal coupled to an input terminal of the analog mixer phase detector;

a loop filter having a first input terminal coupled to an output terminal of the analog mixer phase detector; and

a voltage controlled oscillator having a control terminal coupled to an output terminal of the loop filter; and

an auxiliary digital frequency detector having an output terminal coupled to a second input terminal of the loop filter.

2. The frequency synthesizer of claim 1 , wherein the analog mixer phase detector is for detecting a phase difference between the output signal of the programmable divider and a reference signal.

3. The frequency synthesizer of claim 1 , wherein the programmable divider includes a direct digital synthesizer.

4. The frequency synthesizer of claim 1 , wherein the auxiliary digital frequency detector has a first input terminal coupled to the output terminal of the programmable divider.

5. The frequency synthesizer of claim 4 , further comprising a comparator coupled between the output terminal of the programmable divider and the first input terminal of the auxiliary digital frequency detector.

6. The frequency synthesizer of claim 4 , further comprising a differential integrator circuit coupled between the output terminal of the auxiliary digital frequency detector and the second input terminal of the loop filter.

7. The frequency synthesizer of claim 6 , wherein the second input terminal of the loop filter is coupled to a timing capacitor such that an output terminal of the differential integrator circuit is coupled to the timing capacitor of the loop filter.

8. The frequency synthesizer of claim 7 , further comprising a steering resistor coupled between the output terminal of the differential integrator circuit and the timing capacitor of the loop filter.

9. The frequency synthesizer of claim 8 , wherein the programmable divider includes a direct digital synthesizer.

10. The frequency synthesizer of claim 9 , further comprising a comparator coupled between the output terminal of the programmable divider and the first input terminal of the auxiliary digital frequency detector.

11. The frequency synthesizer of claim 9 , further comprising a prescaler responsive to the output signal of the frequency synthesizer and coupled to the input terminal of the programmable divider.

12. The frequency synthesizer of claim 9 , further comprising a balun transformer coupled between the output terminal of the programmable divider and the input terminal of the analog mixer phase detector.

13. The frequency synthesizer of claim 12 , further comprising a bandpass filter coupled between the balun transformer and the input terminal of the analog mixer phase detector.

14. The frequency synthesizer of claim 13 , further comprising an amplifier coupled between the bandpass filter and the input terminal of the analog mixer phase detector.

15. A frequency synthesizer, comprising:

a phase locked loop comprising:

an analog mixer phase detector;

a programmable divider having an input terminal responsive to an output signal of the frequency synthesizer and having an output terminal coupled to an input terminal of the analog mixer phase detector;

a loop filter having a first input terminal coupled to an output terminal of the analog mixer phase detector; and

a voltage controlled oscillator having a control terminal coupled to an output terminal of the loop filter; and

means, coupled to a second input terminal of the loop filter, for making the analog mixer phase detector automatically acquire phase lock when the phase locked loop is out of lock.

16. The frequency synthesizer of claim 15 , wherein the programmable divider includes a direct digital synthesizer.

17. In a frequency synthesizer including a voltage controlled oscillator, a loop filter, and an analog mixer phase detector, a method comprising:

adjusting the voltage applied to the voltage controlled oscillator from the loop filter until the frequency of an output signal of the analog mixer phase detector is within a pass-band of the loop filter by providing a current to a timing capacitor of the loop filter to cause the voltage supplied to the voltage controlled oscillator to change based on a time constant of the loop filter, wherein the current provided to the timing capacitor of the loop filter is provided from an integrator circuit responsive to an output signal from an auxiliary digital frequency detector whose output signal is related to a phase difference between an output signal of a programmable divider and a reference signal supplied to the auxiliary digital frequency detector, wherein the programmable divider is responsive to an output signal of the frequency synthesizer.

18. The frequency synthesizer of claim 1 , wherein the auxiliary digital frequency detector is for providing a current to a timing capacitor of the loop filter to cause the voltage supplied to the voltage controlled oscillator to change based on a time constant of the loop filter.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 16, 2014
From: AGILENT TECHNOLOGIES, INC.
To: KEYSIGHT TECHNOLOGIES, INC.
Reel/Frame 033746/0714 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE FROM MERGER TO NUNC PRO TUNC ASSIGNMENT PREVIOUSLY RECORDED ON REEL 026165 FRAME 0917. ASSIGNOR(S) HEREBY CONFIRMS THE NUNC PRO TUNC ASSIGNMENT. Recorded May 1, 2013
From: TELEDYNE WIRELESS LLC
To: AGILENT TECHNOLOGIES, INC.
Reel/Frame 030331/0275 →
MERGER Recorded Apr 21, 2011
From: TELEDYNE WIRELESS LLC
To: AGILENT TECHNOLOGIES, INC.
Reel/Frame 026165/0917 →
CHANGE OF NAME Recorded Jan 20, 2009
From: TELEDYNE WIRELESS, INC.
To: TELEDYNE WIRELESS, LLC
Reel/Frame 022127/0198 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 27, 2005
From: TELEDYNE TECHNOLOGIES INCORPORATED
To: TELEDYNE WIRELESS, INC.
Reel/Frame 015612/0322 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 14, 2003
From: WILLIAMS, ANTHONY DAVID
To: TELEDYNE TECHNOLOGIES INCORPORATED
Reel/Frame 014710/0792 →