IP Library Granted Patent US 7,349,508
Granted Patent B2
US 7,349,508 · App. 10/714,202 · Granted Mar 25, 2008

Method for reconstructing data clocked at a symbol rate from a distorted analog signal

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Quick Facts
Patent No.
US 7,349,508
App. No.
10/714,202
Granted
Mar 25, 2008
Kind
B2
Abstract

A method and a device for reconstructing data, clocked at a symbol rate, from a signal which has been distorted by transmission of a transmission link, are disclosed. The method or respectively, the device, being predominantly performed or implemented, respectively, by means of digital circuit technology in order to improve the quality of the data recovery. The method includes amplifying the signal amplitude attenuated by the transmission; filtering high-frequency interference frequencies above the symbol rate; discretizing the analog signal by means of an analog/digital converter; performing a cable approximation by means of a digitally implemented cable approximation filter in order to obtain an equalized signal; and recovering the data from the equalized signal by means of a phase-locked loop.

Claims (50)

1. A method for reconstructing data, clocked at a symbol rate, from an analog signal which has been distorted and attenuated by transmission of a transmission link having a cable transfer function, comprising:

amplifying the signal amplitude of the analog signal that is attenuated by the transmission;

filtering high-frequency interference of the analog signal at frequencies above the symbol rate, thereby generating an analog amplified filtered signal;

discretizing the amplified filtered analog signal by means of an oversampled analog/digital converter to form a digital signal;

carrying out a cable approximation by simulation of the inverse of the cable transfer function on the digital signal by means of a digitally implemented cable approximation filter in order to obtain an equalized signal; and

interpolating and then low-pass filtering the equalized signal by means of an interpolation and filter unit; and

decimating the interpolated and filtered signal by means of a decimator which is arranged in the control loop of a phase-locked loop for recovering the original data from the equalized signal.

2. The method according to claim 1 , wherein the analog/digital converter oversamples the supplied data signal n-times in order to transform low-frequency noise into a higher-frequency spectrum.

3. The method according to claim 1 , wherein the step of filtering of high-frequency interferers is performed by means of a digital filter which is arranged between the analog/digital converter and the cable approximation filter.

4. The method according to claim 1 , further comprising the step of reducing of the data rate of the discrete signal by at least a factor of m=2 in order to obtain a decimated signal.

5. The method according to claim 1 , further comprising filtering of low-frequency components below a predetermined lower cut-off frequency by means of a digital filter.

6. The method according to claim 5 , wherein low-frequency components are filtered before the cable approximation is carried out.

7. The method according to claim 1 , wherein the cable approximation is carried out by means of a digital FIR filter.

8. The method according to claim 1 , wherein amplification of the signal amplitude and the cable approximation is controlled by a digitally implemented equalizer control unit.

9. The method according to claim 1 , wherein the sets of coefficients required for setting the cable approximation are temporarily stored in a memory device.

10. The method according to claim 1 , wherein the interpolation and low-pass filtering takes place outside a control loop of said phase-locked loop for clock and data recovery.

11. The method according to claim 1 , wherein a regenerated clock running synchronously with the signal clock is generated by means of the phase-locked loop.

12. The method according to claim 1 , wherein the decimation is controlled with the aid of a peak detector and of a phase detector.

13. The method according to claim 1 , wherein the clock control characteristic of the phase-locked loop is adjusted by means of a timing loop filter.

14. The method according to claim 11 , wherein the recovered data are output synchronously with the regenerated clock.

15. A device for reconstructing data clocked at a symbol rate from an analog signal which has been distorted and attenuated by transmission of a transmission link having a cable transfer function, comprising:

an amplifier for amplifying the signal amplitude of the analog signal attenuated by the transmission;

a low-pass filter for filtering high-frequency interferers in the analog signal at frequencies above the symbol rate, thereby generating an analog amplified filtered signal;

an analog-digital converter for discretizing the analog amplified filtered signal, thereby generating a digital signal;

a digital cable approximation filter having a transfer function which is matched to the inverse of the cable transfer function for generating an essentially equalized, discrete signal based on the digital signal;

a digital interpolation and filter unit for interpolating and then low-pass filtering the equalized signal; and

a phase-locked loop for recovering the data from the equalized signal, a digital decimator being arranged in a control loop of the phase-locked loop.

16. The device according to claim 15 , wherein the analog/digital converter oversamples the analog data signal n-times in order to transform low-frequency noise into a high-frequency spectrum.

17. The device according to claim 15 , wherein following the analog/digital converter, a digital low-pass filter is provided for filtering high-frequency interferers above the symbol rate.

18. The device according to claim 17 , wherein following the low-pass filter, a decimator is provided in order to obtain a decimated, decimated, discrete signal for a subsequent high-pass filter.

19. The device according to claim 15 , wherein a high-pass filter is provided for filtering low-frequency components below a predetermined lower cut-off frequency.

20. The device according to claim 15 , wherein a digital cable approximation filter comprises a FIR filter.

21. The device according to claim 20 , wherein an equalizer control unit is provided for controlling the setting of the amplifier and the characteristic of the digital cable approximation filter.

22. The device according to claim 21 , wherein the sets of coefficients for controlling the digital cable approximation filter are temporarily stored in a memory device.

23. A device for reconstructing data clocked at a symbol rate from an analog signal which has been distorted and attenuated by transmission of a transmission link having a cable transfer function, comprising:

an amplifier receiving an analog signal and generating an amplified analog signal;

a low-pass filter receiving the amplified analog signal and generating a filtered analog signal;

an analog/digital converter receiving the amplified filtered analog signal and generating a digital signal;

a digital cable approximation filter having a transfer function which is matched to the inverse of the cable transfer function receiving the digital signal and generating an equalized digital signal;

a digital cable interpolation and filter unit receiving the equalized digital signal and generating an interpolated filtered signal; and

a phase-locked loop receiving the interpolated filtered signal, wherein a digital decimator is arranged in a control loop of the phase-locked loop.

24. The device according to claim 23 , wherein the analog/digital converter oversamples the analog data signal n-times in order to transform low-frequency noise into a high-frequency spectrum above the symbol rate.

25. The device according to claim 23 , further comprising a digital low-pass filter coupled between said analog/digital converter and said digital cable approximation filter.

26. The device according to claim 25 , further comprising a decimator coupled between said digital low pass filter and said digital cable approximation filter.

27. The device according to claim 25 , further comprising a high-pass filter coupled between said decimator and said digital cable approximation filter.

28. The device according to claim 25 , wherein the digital cable approximation filter is a FIR filter.

29. The device according to claim 28 , further comprising an equalizer control unit coupled with the amplifier and the cable approximation filter.

30. The device according to claim 29 , further comprising a memory device for storing sets of coefficients for controlling the cable approximation filter coupled between the equalizer control unit and the cable approximation filter.

31. The device according to claim 15 , wherein the analog/digital converter comprises a sigma delta analog/digital converter.

32. The device according to claim 23 , wherein the analog/digital converter comprises a sigma delta analog/digital converter.

Assignments (10)
SECURITY AGREEMENT Recorded Jul 9, 2021
From: MAXLINEAR, INC.; MAXLINEAR COMMUNICATIONS, LLC; EXAR CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 056816/0089 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 27, 2020
From: INTEL CORPORATION
To: MAXLINEAR, INC.
Reel/Frame 053626/0636 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 20, 2020
From: LANTIQ BETEILIGUNGS-GMBH & CO. KG
To: INTEL CORPORATION
Reel/Frame 053259/0678 →
MERGER AND CHANGE OF NAME Recorded Jan 17, 2018
From: LANTIQ DEUTSCHLAND GMBH; LANTIQ BETEILIGUNGS-GMBH & CO. KG
To: LANTIQ BETEILIGUNGS-GMBH & CO. KG
Reel/Frame 045086/0015 →
RELEASE OF SECURITY INTEREST RECORDED AT REEL/FRAME 025413/0340 AND 025406/0677 Recorded Apr 17, 2015
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LANTIQ BETEILIGUNGS-GMBH & CO. KG
Reel/Frame 035453/0712 →
GRANT OF SECURITY INTEREST IN U.S. PATENTS Recorded Nov 29, 2010
From: LANTIQ DEUTSCHLAND GMBH
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 025406/0677 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 15, 2010
From: INFINEON TECHNOLOGIES WIRELESS SOLUTIONS GMBH
To: LANTIQ DEUTSCHLAND GMBH
Reel/Frame 024529/0593 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 3, 2010
From: INFINEON TECHNOLOGIES AG
To: INFINEON TECHNOLOGIES WIRELESS SOLUTIONS GMBH
Reel/Frame 024483/0021 →
RECORD TO CORRECT MISSPELLING OF NAME OF 2ND INVENTOR PREVIOUSLY RECORDED AT 015011/0685 Recorded Sep 15, 2004
From: DUDA, THOMAS; GAZSI, LAJOS; GREGORIUS, PETER; HINZ, TORSTEN; RENNER, MARTIN
To: INFINEON TECHNOLOGIES AG
Reel/Frame 016137/0437 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 24, 2004
From: DUDA, THOMAS; GAZSI, JAJOS; GREGORIUS, PETER; HINZ, TORSTEN; RENNER, MARTIN
To: INFINEON TECHNOLOGIES AG
Reel/Frame 015011/0685 →