Sub-harmonic mixer
View Patent ↗A sub-harmonic mixer comprises two field effect transistors in which the sources of the transistors are connected together and the drains of the transistors are connected together. The mixer includes signal generating means for generating a local oscillator (LO) signal coupled to the gate of one of the FETs. Circuit means is provided for maintaining the potential of the gate of the other FET at a substantially constant value relative to the local oscillator signal applied to the gate of the driven FET, and the FET's are arranged to permit the local oscillator signal applied to gate of the driven FET to drive a voltage across the gate-source of both FET's. An input and output port is coupled to the drains for receiving input signals for the mixer and outputting output signals from the mixer.
1. A sub-harmonic mixer comprising:
first and second field effect transistors (FETs) each having a gate, a source and a drain, the source of the first FET being connected to the source of the second FET and the drain of the first FET being connected to the drain of the second FET;
input means coupled to said drains for receiving an input signal for the mixer;
signal generating means for generating a local oscillator (LO) signal and coupled to the gate of one of said first and second FETs, means for maintaining the potential of the gate of the other of said first and second FETs at a substantially constant value relative to the LO signal applied to the gate of said one FET, said FETs being arranged to permit said LO signal applied to the gate of said one FET to drive a voltage across the gate-source of each of said first and second FETs, and
output means coupled to said drains for outputting an output signal from the mixer.
2. A sub-harmonic mixer as claimed in claim 1 , further comprising input signal coupling means for coupling the source of each of said first and second field effect transistors to ground at the frequency of the input signal.
3. A sub-harmonic mixer as claimed in claim 1 , further comprising output signal coupling means for coupling the source of each of said first and second field effect transistors to ground at the frequency of the output signal.
4. A sub-harmonic mixer as claimed in claim 1 , further comprising DC coupling means for coupling the source of each of said first and second transistors to DC ground.
5. A sub-harmonic mixer as claimed in claim 1 , further comprising isolating means for substantially isolating the source of each of said first and second transistors from ground at the frequency of said LO signal.
6. A sub-harmonic mixer as claimed in claim 1 , further comprising circuit means coupled between the gate and the source of at least one of the first and second field effect transistor for substantially matching the magnitude of the gate-source voltages applied across the first and second field effect transistors by said LO signal.
7. A sub-harmonic mixer as claimed in claim 6 , wherein said circuit means comprises a capacitor for passing a portion of said LO signal between a gate and a source of said at least one field effect transistor.
8. A sub-harmonic mixer as claimed in claim 6 , wherein said circuit means comprises a diode for passing a portion of said LO signal between a gate and a source of said at least one field effect transistor.
9. A sub-harmonic mixer as claimed in claim 1 , further comprising biasing means for biasing the gate of each of said first and second field effect transistors at a bias voltage such that each of said first and second field effect transistors operate in pinch-off mode.
10. A sub-harmonic mixer as claimed in claim 9 , further comprising gate signal filter means for substantially preventing signals having frequencies of any of said local oscillator signal, said input signal and said output signal passing from a respective gate to said biasing means.
11. A sub-harmonic mixer as claimed in claim 10 , wherein said gate signal filter means comprises a choke.
12. A sub-harmonic mixer as claimed in claim 1 , further comprising DC coupling means for coupling the drains of each of said first and second field effect transistors to DC ground.
13. A sub-harmonic mixer as claimed in claim 12 , further comprising filter means for preventing said input signal and said output signal passing through said DC coupling means.
14. A sub-harmonic mixer as claimed in claim 1 , wherein said input means comprises an input port and RF filter means connected between said input port and said drains, and adapted to pass signals having frequencies within a frequency band above the frequency of said local oscillator signal.
15. A sub-harmonic mixer as claimed in claim 1 , further comprising filter means coupled to the drains of said field effect transistors for passing frequencies within a frequency band below the frequency of said local oscillator signal.
16. A sub-harmonic mixer, comprising:
first and second FETs (Field Effect Transistors) each having a gate, a drain and a source, the drain of the first FET being connected to the drain of the second FET and the source of the first FET being connected to the source of the second FET;
input means coupled to one of (1) said sources and (2) said drains for receiving an input signal for the mixer;
signal generating means for generating a local oscillator signal and coupled to the gate of one of said first and second FETs, means for maintaining the potential of the gate of the other of said first and second FETs at a substantially constant value relative to the local oscillator signal applied to the gate of said one FET, said FETs being arranged to permit said LO signal applied to the gate of said one FET to drive a voltage across (1) the gate-source of each of said first and second FET's, if said input means is connected to said drains and (2) across the gate-drain of each of said first and second FETs, if said input means is connected to said sources, and
output means coupled to one of (1) said sources and (2) said drains for outputting an output signal from the mixer.
17. A sub-harmonic mixer, comprising first and second bi-polar transistors, each having a base, a collector and an emitter, the collector of the first transistor being connected to the collector of the second transistor and the emitter of the first transistor being connected to the emitter of the second transistor;
input means coupled to one of (1) said collectors and (2) said emitters for receiving an input signal for the mixer;
signal generating means for generating a local oscillator signal and coupled to the base of one of the first and second transistors, means for maintaining the potential of the base of the other of said first and second transistors at a substantially constant value relative to the LO signal applied to the base of said one transistor, said transistors being arranged to permit said LO signal applied to the base of said one transistor to drive a voltage across one of the base-collector and base-emitter of each of the first and second transistors, and output means coupled to one of (1) the collectors and (2) emitters for outputting an output signal from the mixer.