IP Library Granted Patent US 7,023,753
Granted Patent B2
US 7,023,753 · App. 10/724,987 · Granted Apr 4, 2006

Current controlled word and sense source

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Quick Facts
Patent No.
US 7,023,753
App. No.
10/724,987
Granted
Apr 4, 2006
Kind
B2
Abstract

A current controlled sense current source having a current source with a stable reference current output is provided with a sense current source having a sense current reference input connected to the stable reference current output with the sense current source having a sense current output. A current controlled word current source comprising a current source having a stable reference current output is also provided with a word current source having a word current reference input connected to the stable reference current output with the word current source having a word current output.

Claims (28)

1. A current controlled sense current source for a magnetoresistive random access memory comprising:

a current source having a stable reference current output;

a sense current source having a sense current reference input connected to the stable reference current output with the sense current source having a sense current output;

bias tuning circuit comprising, in combination;

a bias generator having a bias output;

a plurality of switches having a word reference input and a mirror transistor output;

a plurality of mirror transistors connected to one of the mirror transistor outputs;

a transistor connected in a mirror configuration with the plurality of mirror transistors having a tuned reference output;

a selector to select one of the mirror transistor to activate the transistor to set the voltage to the plurality of mirror transistors;

a pad; and

a indicator transistor in a mirror configuration with the transistor connected to the pad to provide an indicator.

2. The current controlled sense current source of claim 1 with the pad being an external pad.

3. The current controlled sense current source of claim 1 with the indicator transistor having a gain that is a multiple of the transistor.

4. The current controlled sense current source of claim 1 with the plurality of mirror transistors are n-channel transistors.

5. The current controlled sense current source of claim 1 with the plurality of switches being transistors.

6. The current controlled sense current source of claim 1 with the transistor being an N-channel transistor.

7. A current controlled sense current source for a magnetoresistive random access memory comprising:

a current source having a stable reference current output;

a sense current source having a sense current reference input connected to the stable reference current output with the sense current source having a sense current output;

bias tuning circuit comprising, in combination:

a bias generator having a bias output;

a plurality of switches having a word reference input and a mirror transistor output;

a plurality of mirror transistors connected to one of the mirror transistor outputs;

a transistor connected in a mirror configuration with the plurality of mirror transistors having a tuned reference output;

a selector to select one of the mirror transistor to activate the transistor to set the voltage to the plurality of mirror transistors;

with the bias generator being a temperature and voltage compensated bias generator.

8. The bias turning circuit of claim 1 with the selector selecting one of the plurality of mirror transistors to compensate for a tested parameter.

9. The current controlled sense current source of claim 8 with the tested parameter being a manufacturing variance.

Assignments (3)
ATTORNEY'S LIEN Recorded Dec 27, 2005
From: UNION SEMICONDUCTOR TECHNOLOGY CORPORATION
To: RIDER BENNETT, LLP
Reel/Frame 017136/0929 →
ATTORNEY'S LIEN Recorded Aug 9, 2005
From: UNION SEMICONDUCTOR TECHNOLOGY CORPORATION
To: RIDER BENNETT, LLP
Reel/Frame 017186/0335 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 28, 2004
From: THEEL, WAYNE
To: UNION SEMICONDUCTOR TECHNOLOGY CORPORATION
Reel/Frame 016106/0277 →