Flat panel display with thin film transistor (TFT)
View Patent ↗A flat panel display which can adjust a white balance to a proper level according to the difference among the crystal grains of driving TFT active layers without changing the sizes of the driving TFT active layers. The flat panel display also can obtain an appropriate luminance by supplying an optimal amount of current to each sub-pixel. The flat panel display has a plurality of pixels. Each of the pixels includes a plurality of sub-pixels and each sub-pixel has a self-luminescent element and a driving thin film transistor. Each of the driving thin film transistors has a semiconductor active layer having a channel region is connected to the self-luminescent element of the corresponding sub-pixel in order to supply current to each of the self-luminescent elements. At least the channel regions of the semiconductor active layers have crystal grains of different sizes or shapes for different sub-pixels.
1. A flat panel display comprising:
a plurality of pixels, each pixel including a plurality of sub-pixels, each sub-pixel comprising
a self-luminescent element; and
driving thin film transistors each driving transistor having a semiconductor active layer having a channel region connected to the self-luminescent elements of the sub-pixel to which the driving transistor belongs to supply current to each of the self-luminescent elements, wherein at least the channel regions of the semiconductor active layers have different crystal grains for different sub-pixels.
2. The flat panel display of claim 1 , wherein there are sub-pixels for at least two different colors.
3. The flat panel display of claim 2 , wherein the channel regions of the semiconductor active layers have different crystal grains for the sub-pixels associated with each of a plurality of different colors.
4. The flat panel display of claim 1 , wherein the difference in the crystal grains between the channel regions is determined by an amount of current flowing in each of the sub-pixels, associated with each of a plurality of different colors.
5. The flat panel display of claim 1 , wherein the difference in the crystal grains between the channel regions is determined by a current mobility value of each of the channel regions.
6. The flat panel display of claim 1 , wherein the difference in the crystal grains between the channel regions is determined by a size of the crystal grains of each of the channel regions.
7. The flat panel display of claim 6 , wherein the size of each of the crystal grains of each of the channel regions is proportional to an amount of current flowing in each of the sub-pixels of different colors when a substantially identical driving voltage is applied to the sub-pixels associated with each of a plurality of different colors.
8. The flat panel display of claim 6 , wherein the size of each of the crystal grains of each of the channel regions is proportional to a current mobility value of each of the channel regions.
9. The flat panel display of claim 1 , wherein the difference in the crystal grains between the channel regions is determined by a shape of the crystal grains of each of the channel regions.
10. The flat panel display of claim 9 , wherein the shape of each of the crystal grains of each of the channel regions is determined so that at least the channel regions of sub-pixels in which a lowest amount of current flows at an identical driving voltage have shapeless grain boundaries.
11. The flat panel display of claim 10 , wherein the shape of each of the crystal grains of each of the channel regions is determined so that at an identical driving voltage at least the channel regions of the sub-pixels in which a higher current flows than the amount of current flowing in sub-pixels with the shapeless grain boundaries have parallel primary grain boundaries in at least one strip and a rectangular shape and side grain boundaries of anisotropic grains extending approximately perpendicular to the primary grain boundaries and between adjacent primary grain boundaries.
12. The flat panel display of claim 9 , wherein the shape of each of the crystal grains of each of the channel regions is determined so that at least the channel regions of sub-pixels in which a highest amount of current flows at a substantially identical driving voltage have parallel primary grain boundaries in strips and side grain boundaries of anisotropic grains extending approximately perpendicular to the primary grain boundaries and between adjacent primary grain boundaries.
13. The flat panel display of claim 9 , wherein the shape of each of the crystal grains of each of the channel regions is determined so that at least the channel regions of sub-pixels having a lowest current mobility have shapeless grain boundaries.
14. The flat panel display of claim 13 , wherein the shape of each of the crystal grains of each of the channel regions is determined so that at least the channel regions of sub-pixels with a current mobility higher than the sub-pixels having the shapeless grain boundaries have parallel primary grain boundaries in the shape of at least one strip and a rectangle and side grain boundaries of anisotropic grains extending approximately perpendicular to the primary grain boundaries and between adjacent primary grain boundaries.
15. The flat panel display of claim 9 , wherein the shape of each of the crystal grains of each of the channel regions is determined so that at least the channel regions of sub-pixels with a highest current mobility have parallel primary grain boundaries in strips and side grain boundaries of anisotropic grains extending approximately perpendicular to the primary grain boundaries and between adjacent primary grain boundaries.
16. The flat panel display of claim 1 , wherein at least the channel regions of the active layers are formed of polycrystalline silicon.
17. The flat panel display of claim 16 , wherein the polycrystalline silicon is formed using a solidification method using laser.
18. A flat panel display comprising:
a plurality of pixels, each pixel including sub-pixels of red, green, and blue colors, each sub-pixel comprising
a self-luminescent element; and
driving thin film transistors, each driving the film transistor having a semiconductor active layer with a channel region connected to the self-luminescent element of the sub-pixel to which the driving transistor belongs in order to supply current to each of the self-luminescent elements, wherein the channel regions of the semiconductor active layers have different crystal grains for the sub-pixels at least two different colors.
19. The flat panel display of claim 18 , wherein the difference in the crystal grains between the channel regions is determined according to a size of each of the crystal grains of each of the channel regions.
20. The flat panel display of claim 19 , wherein the size of each of the crystal grains of each of the channel regions is determined so that a current of a smallest value flows in the green sub-pixels.
21. The flat panel display of claim 19 , wherein the size of each of the crystal grains of each of the channel regions is determined so that the value of current flowing in the sub-pixels decreases in the sequence of red, blue, and then green sub-pixels when an identical driving voltage is applied to the red sub-pixels, blue sub-pixels, and the green sub-pixels.
22. The flat panel display of claim 19 , wherein the size of each of the crystal grains of each of the channel regions is determined so that the channel regions of the semiconductor active layers of the green sub-pixels have a smallest mobility value.
23. The flat panel display of claim 19 , wherein the size of each of the crystal grains of each of the channel regions is determined so that the mobility values of the channel regions of the sub-pixels decrease in the sequence of red, blue, and then green sub-pixels.
24. The flat panel display of claim 19 , wherein the size of each of the crystal grains of each of the channel regions decreases in the sequence of red, blue, and then green sub-pixels.
25. The flat panel display of claim 18 , wherein the difference in the crystal grains between the channel regions is determined by a shape of the crystal grains of each of the channel regions.
26. The flat panel display of claim 25 , wherein the shape of each of the crystal grains of each of the channel regions is determined so that a current of a smallest amount flows in the green sub-pixels.
27. The flat panel display of claim 25 , wherein the shape of each of the crystal grains of each of the channel regions is determined so that the amount of current flowing in the sub-pixels decreases in the sequence of red sub-pixels, blue sub-pixels, and then the green sub-pixels when an identical driving voltage is applied to the red sub-pixels, the blue sub-pixels, and the green sub-pixels.
28. The flat panel display of claim 25 , wherein the shape of each of the crystal grains of each of the channel regions is determined so that the channel regions of the semiconductor active layers of the green sub-pixels have a smallest mobility value.
29. The flat panel display of claim 25 , wherein the shape of each of the crystal grains of each of the channel regions is determined so that the mobility values of the channel regions of the sub-pixels decrease in the sequence of the red sub-pixels, the blue sub-pixels, and then the green sub-pixels.
30. The flat panel display of claim 25 , wherein the crystal grains of at least the channel regions of the red sub-pixels among all of the channel regions of the sub-pixels have parallel primary grain boundaries and side grain boundaries of anisotropic grains extending approximately perpendicular to the primary grain boundaries and between adjacent primary grain boundaries, and the primary grain boundaries are in the shape of strips perpendicular to the lengthwise of the active layers of the red sub-pixels.
31. The flat panel display of claim 25 , wherein at least the channel regions of the green sub-pixels among the channel regions of all of the sub-pixels have shapeless grain boundaries.
32. The flat panel display of claim 25 , wherein at least the channel regions of the blue sub-pixels among the channel regions of all of the sub-pixels have parallel primary grain boundaries in a rectangular shape and side grain boundaries of anisotropic grains extending approximately perpendicular to the primary grain boundaries and between adjacent primary grain boundaries.
33. The flat panel display of claim 18 , wherein at least the channel regions of the semiconductor active layers are formed of polycrystalline silicon.
34. The flat panel display of claim 33 , wherein the polycrystalline silicon is formed using a solidification method using laser.