IP Library Patent Application 10725771
Patent Application
App. No. 10/725,771

Reduction of memory requirements by overlaying buffers

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Patent No.
US None
App. No.
10/725,771
Abstract

Presented herein is a method and system for reducing the total memory required by an audio decoding device by providing audio decoder buffer optimization, memory overwriting capability during audio decoding, and ordered processing of audio decoder program operations. Memory may be reduced by applying the buffer overlaying method to reduce the amount of memory to perform audio decoding to a minimum amount of memory. Audio decoding devices implementing the memory reducing method may be provided with a minimum amount of memory, reducing the cost of the audio decoding devices while efficiently decoding audio signals.

Claims (38)

1 . A method of reducing memory required to decode an audio signal in an audio decoding system, the method comprising:

performing a first audio decoding function;

writing data corresponding to the first audio decoding function to a memory;

performing a second audio decoding function;

writing data corresponding to the second audio decoding function to at least a portion of the memory, whereby the data corresponding to the first audio function is at least partially overwritten by the data corresponding to the second audio decoding function.

2 . The method according to claim 1 , wherein the audio decoding functions are adapted for processing all groups together.

3 . The method according to claim 2 , further comprising performing the audio decoding functions in an order based upon memory allocation.

4 . The method according to claim 2 , wherein a minimum amount of memory to perform the audio decoding functions in a particular group is allocated.

5 . The method according to claim 1 , wherein a minimum amount of memory to perform all audio decoding functions in a single memory device is allocated.

6 . The method according to claim 1 , wherein each of a plurality of memory devices are allocated to storing data corresponding to at least one audio decoding function.

7 . The method according to claim 6 , wherein each of a plurality of memory devices are allocated to storing data corresponding to a group of audio decoding functions.

8 . The method according to claim 1 , wherein at least one audio decoding function is optimized to reduce memory used to process the function.

9 . The method according to claim 1 , further comprising performing a plurality of audio decoding functions in a single memory device, wherein memory sufficient to perform an audio decoding function using a maximum amount of memory is allocated, and each audio decoding function is performed using less memory in the single memory device.

10 . The method according to claim 1 , further comprising:

performing a third audio decoding function to another memory; and

writing data corresponding to the second audio decoding function to at least a portion of the other memory, whereby the data corresponding to the third audio function is at least partially overwritten by the data corresponding to the second audio decoding function.

11 . The method according to claim 1 , further comprising:

performing a plurality of audio decoding functions grouped into a plurality of groupings in a plurality of memory devices;

allocating memory sufficient to perform an audio decoding function using a maximum amount of memory within each grouping; and

performing all audio decoding functions in a grouping within the memory allocated to perform the function using the maximum amount of memory.

12 . An integrated circuit for decoding a audio data, the integrated circuit comprising:

a controller;

a memory connected to the controller;

an instruction memory connected to the controller, the instruction memory comprising a plurality of instructions, wherein execution of the plurality of instructions by the controller causes:

performing a first audio decoding function;

writing data corresponding to the first audio decoding function to the memory;

performing a second audio decoding function; and

writing data corresponding to the second audio decoding function to at least a portion of the memory, whereby the data corresponding to the first audio function is at least partially overwritten by the data corresponding to the second audio function.

13 . The integrated circuit of claim 12 , wherein the audio decoding functions to be processed are grouped together.

14 . The integrated circuit of claim 13 , wherein execution of the plurality of instructions by the controller causes performing of the audio decoding functions in an order based upon memory allocation.

15 . The integrated circuit of claim 13 , further comprising:

a plurality of memory devices connected to the controller, wherein each of the plurality of memory devices are allocated to storing data corresponding to at least one audio decoding function.

16 . The integrated circuit of claim 15 , wherein each of the plurality of memory devices are allocated to storing data corresponding to a group of audio decoding functions.

17 . The integrated circuit of claim 12 , wherein at least one audio decoding function is optimized to reduce memory used to store data corresponding to the at least one audio decoding function.

18 . A system for decoding audio signals with a minimum amount of memory, the system comprising:

a controller for performing a plurality of audio functions; and

at least one memory device for storing data corresponding to an initially performed audio decoding function, and storing data corresponding to a later performed audio decoding function, wherein the data corresponding to the initially performed audio decoding function is at least partially overwritten by the data corresponding to the later performed audio decoding function.

19 . The system of claim 18 , further comprising an instruction memory for storing a plurality of instructions, wherein execution of the plurality of instructions by the controller causes performing the plurality of audio functions.

Assignments (4)
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 2, 2003
From: RAO, ARUN; KOSHY, SUNOJ
To: BROADCOM CORPORATION
Reel/Frame 014761/0504 →