System and method for reducing off-current in thin film transistor of liquid crystal display device
View Patent ↗A system for reducing an OFF-current in a thin film transistor of a liquid crystal display device includes gate and data lines crossing each other, a pixel thin film transistor including gate, source and drain electrodes, the gate electrode connected to the gate line and the source electrode connected to the data line, a liquid crystal capacitor connected to the drain electrode of the pixel thin film transistor, a first switch thin film transistor connected to a first end of the data line, a second switch thin film transistor connected to a first end of the gate line, a first voltage source electrically connected to the drain electrode of the pixel thin film transistor, a second voltage source connected to a source electrode of the first switch thin film transistor, a third voltage source connected to gate electrodes of the first and second switch thin film transistors, and a fourth voltage source connected to a source electrode of the second switch thin film transistor.
1. A system for reducing an OFF-current in a thin film transistor of a liquid crystal display device, comprising:
gate and data lines crossing each other;
a pixel thin film transistor including gate, source and drain electrodes, the gate electrode connected to the gate line and the source electrode connected to the data line;
a liquid crystal capacitor connected to the drain electrode of the pixel thin film transistor;
a first switch thin film transistor connected to a first end of the data line;
a second switch thin film transistor connected to a first end of the gate line;
a first voltage source electrically connected to the drain electrode of the pixel thin film transistor;
a second voltage source connected to a source electrode of the first switch thin film transistor;
a third voltage source connected to gate electrodes of the first and second switch thin film transistors; and
a fourth voltage source connected to a source electrode of the second switch thin film transistor.
2. The system according to claim 1 , wherein the first voltage source supplies alternating current (AC) voltage to the drain electrode of the pixel thin film transistor.
3. The system according to claim 2 , wherein the second, third, and fourth voltage sources supply direct current (DC) voltages.
4. The system according to claim 1 , further comprising a storage capacitor between the drain electrode of the pixel thin film transistor and the first voltage source.
5. The system according to claim 1 , further comprising an electrostatic discharge (ESD) protection circuit between the first switch thin film transistor and the data line.
6. The system according to claim 1 , wherein the pixel thin film transistor and the first and second switch thin film transistors include p-type polycrystalline silicon as active layers.
7. The system according to claim 1 , further comprising a gate driver integrated circuit (IC) connected to a second end of the gate line and a data driver integrated circuit (IC) electrically connected to a second end of the data line.
8. The system according to claim 7 , further comprising a pass-gate thin film transistor between the data line and the data driver IC.
9. The system according to claim 1 , wherein the first to fourth voltage sources are connected to a liquid crystal panel including the pixel thin film transistor and the liquid crystal capacitor by using one of tape carrier package (TCP) and flexible printed circuit (FPC).
10. A system for reducing an OFF-current in a thin film transistor of a liquid crystal display device, comprising:
gate and data lines crossing each other;
a pixel thin film transistor including gate, source and drain electrodes, the gate electrode connected to the gate line and the source electrode connected to the data line;
a liquid crystal capacitor connected to the drain electrode of the pixel thin film transistor;
a first switch thin film transistor connected to a first end of the data line;
a second switch thin film transistor connected to a first end of the gate line;
a first voltage source electrically connected to the drain electrode of the pixel thin film transistor;
a second voltage source connected to a source electrode of the first switch thin film transistor;
a third voltage source connected to a gate electrode of the first switch thin film transistor;
a fourth voltage source connected to a source electrode of the second switch thin film transistor;
a fifth voltage source connected to a gate electrode of the second switch thin film transistor;
a multiplexing thin film transistor connected to a second end of the data line;
a gate driver integrated circuit (IC) connected to a second end of the gate line; and
a data driver integrated circuit (IC) connected to the multiplexing thin film transistor,
wherein the data driver IC includes a data driver voltage source and a multiplexing circuit signal source such that the data driver voltage source is connected to a source electrode of the multiplexing thin film transistor and the multiplexing circuit signal source is connected to a gate electrode of the multiplexing thin film transistor.
11. The system according to claim 10 , wherein the first voltage source supplies alternating current (AC) voltage to the drain electrode of the pixel thin film transistor.
12. The system according to claim 11 , wherein the second, third, fourth, and fifth voltage sources supply direct current (DC) voltages.
13. The system according to claim 10 , further comprising a storage capacitor between the drain electrode of the pixel thin film transistor and the first voltage source.
14. The system according to claim 10 , wherein the pixel thin film transistor and the first and second thin film transistors include p-type polycrystalline silicon as active layers.
15. A system for reducing an OFF-current in a thin film transistor of a liquid crystal display device, comprising:
gate and data lines crossing each other;
a pixel thin film transistor including gate, source and drain electrodes, the gate electrode connected to the gate line and the source electrode connected to the data line;
a liquid crystal capacitor connected to the drain electrode of the pixel thin film transistor;
a switch thin film transistor connected to a first end of the gate line;
a first voltage source electrically connected to the drain electrode of the pixel thin film transistor;
a second voltage source connected to a source electrode of the switch thin film transistor;
a third voltage source connected to a gate electrode of the switch thin film transistor;
a multiplexing thin film transistor connected to an end of the data line;
a first gate driver integrated circuit (IC) connected to the source electrode of the switch thin film transistor; and
a data driver integrated circuit (IC) connected to the multiplexing thin film transistor,
wherein the data driver IC includes a data driver voltage source and a multiplexing circuit signal source such that the data driver voltage source is connected to a source electrode of the multiplexing thin film transistor and the multiplexing circuit signal source is connected to a gate electrode of the multiplexing thin film transistor.
16. The system according to claim 15 , wherein the first voltage source supplies alternating current (AC) voltage to the drain electrode of the pixel thin film transistor.
17. The system according to claim 16 , wherein the second and third voltage sources supply direct current (DC) voltages.
18. The system according to claim 15 , further comprising a storage capacitor between the drain electrode of the pixel thin film transistor and the first voltage source.
19. The system according to claim 15 , further comprising a second gate driver IC connected to a second end of the gate line.
20. The system according to claim 15 , wherein the pixel thin film transistor and the switch thin film transistor include p-type polycrystalline silicon as active layers.
21. A method for reducing an OFF-current in a thin film transistor of a liquid crystal display device, the liquid crystal display device including gate and data lines crossing each other, a pixel thin film transistor including gate, source and drain electrodes, the gate electrode connected to the gate line and the source electrode connected to the data line, a liquid crystal capacitor connected to the drain electrode of the pixel thin film transistor, a first switch thin film transistor connected to a first end of the data line, and a second switch thin film transistor connected to a first end of the gate line, comprising the steps of:
supplying a first direct current (DC) voltage to gate electrodes of the first and second switch thin film transistors, thereby turning the first and second switch thin film transistors ON;
supplying a second DC voltage to the source electrode of the pixel thin film transistor through the first switch thin film transistor;
supplying a third DC voltage to the gate electrode of the pixel thin film transistor through the second switch thin film transistor to turn the pixel thin film transistor OFF; and
supplying an alternating current (AC) voltage to the drain electrode of the pixel thin film transistor.
22. The method according to claim 21 , wherein the first DC voltage is about −8V.
23. The method according to claim 22 , wherein the second DC voltage is about 0V.
24. The method according to claim 23 , wherein the third DC voltage is about 25V.
25. The method according to claim 24 , wherein the AC voltage has a maximum value of about +15V and a minimum value of about −15V.
26. A method for reducing an OFF-current in a thin film transistor of a liquid crystal display device, the liquid crystal display device including gate and data lines crossing each other, a pixel thin film transistor including gate, source and drain electrodes, the gate electrode connected to the gate line and the source electrode connected to the data line, a liquid crystal capacitor connected to the drain electrode of the pixel thin film transistor, a first switch thin film transistor connected to a first end of the data line, a second switch thin film transistor connected to a first end of the gate line, a multiplexing thin film transistor connected to a second end of the data line, a gate driver integrated circuit (IC) connected to a second end of the gate line, and a data driver integrated circuit (IC) connected to the multiplexing thin film transistor, comprising the steps of:
supplying a first direct current (DC) voltage to a gate electrode of the first switch thin film transistor to turn the first switch thin film transistor OFF;
supplying a second DC voltage to a gate electrode of the multiplexing thin film transistor to turn the multiplexing thin film transistor ON;
supplying a third DC voltage to the source electrode of the pixel thin film transistor through the multiplexing thin film transistor;
supplying a fourth DC voltage to a gate electrode of the second switch thin film transistor to turn the second switch thin film transistor ON;
supplying a fifth DC voltage to the gate electrode of the pixel thin film transistor through the second switch thin film transistor to turn the pixel thin film transistor OFF; and
supplying an alternating current (AC) voltage to the drain electrode of the pixel thin film transistor.
27. The method according to claim 26 , wherein the first DC voltage is about 10V.
28. The method according to claim 27 , wherein the second DC voltage is about −8V.
29. The method according to claim 28 , wherein the third DC voltage is about 0V.
30. The method according to claim 29 , wherein the fourth DC voltage is about −8V.
31. The method according to claim 30 , wherein the fifth DC voltage is about 25V.
32. The method according to claim 31 , wherein the AC voltage has a maximum value of about +15V and a minimum value of about −15V.
33. A method for reducing an OFF-current in a thin film transistor of a liquid crystal display device, the liquid crystal display device including gate and data lines crossing each other, a pixel thin film transistor including gate, source and drain electrodes, the gate electrode connected to the gate line and the source electrode connected to the data line, a liquid crystal capacitor connected to the drain electrode of the pixel thin film transistor, a switch thin film transistor connected to a first end of the gate line, a multiplexing thin film transistor connected to an end of the data line, a first gate driver integrated circuit (IC) connected to a source electrode of the switch thin film transistor, and a data driver integrated circuit (IC) connected to the multiplexing thin film transistor, comprising the steps of:
supplying a first direct current (DC) voltage to a gate electrode of the multiplexing thin film transistor to turn the multiplexing thin film transistor ON;
supplying a second DC voltage to the source electrode of the pixel electrode through the multiplexing thin film transistor;
supplying a third DC voltage to a gate electrode of the switch thin film transistor to turn the switch thin film transistor ON;
supplying a fourth DC voltage to the gate electrode of the pixel thin film transistor through the switch thin film transistor to turn the pixel thin film transistor OFF; and
supplying an alternating current (AC) voltage to the drain electrode of the pixel thin film transistor.
34. The method according to claim 33 , wherein the liquid crystal display device further includes a second gate driver IC connected to a second end of the gate line.
35. The method according to claim 34 , wherein the first DC voltage is about −8V.
36. The method according to claim 35 , wherein the second DC voltage is about 0V.
37. The method according to claim 36 , wherein the third DC voltage is about −8V.
38. The method according to claim 37 , wherein the fourth DC voltage is about 25V.
39. The method according to claim 38 , wherein the AC voltage has a maximum value of about +15V and a minimum value of about −15V.