Integrated circuit which disables writing circuitry to memory when the power drops below a power threshold predetermined and controlled by the processor
View Patent ↗An integrated circuit comprising a processor, non-volatile memory, an input for receiving power from a power supply and a power detection unit, wherein the integrated circuit is configured to enable multi-word writes to the non-volatile memory, the power detection unit being configured to: monitor a quality of power supplied to the input; and in the event the quality of the power drops below a predetermined threshold, preventing subsequent words in any multi-word write currently being performed from being written to the memory.
1. An integrated circuit comprising a processor, non-volatile memory, an input for receiving power from a power supply and a power detection unit, wherein the integrated circuit is configured to enable multi-word writes to the non-volatile memory, the processor being configured to:
control and trim teh amount of power supplied to the input to predetermine a threshold at which operation of the integrated circuit is established; and
the power detection unit being configured to:
monitor a quality of power supplied to the input;
in the event the quality of the power drops below the predetermined threshold, preventing subsequent words in any multi-word write currently being performed from being written to the memory.
2. An integrated circuit according to claim 1 , further configured to prevent any further writes of any type to the memory once the quality is determined to have dropped below the threshold.
3. An integrated circuit according to claim 1 , wherein the quality is a voltage.
4. An integrated circuit according to claim 1 , wherein the memory is flash memory.
5. An integrated circuit according to claim 1 , wherein the power detection unit is configured to provide a reset signal to at least some other circuits on the integrated circuit once any current writes have been finished.