IP Library Granted Patent US 7,260,373
Granted Patent B2
US 7,260,373 · App. 10/727,612 · Granted Aug 21, 2007

Direct conversion receiver

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,260,373
App. No.
10/727,612
Granted
Aug 21, 2007
Kind
B2
Abstract

In a direct conversion receiver, to cancel a DC offset generated in the baseband processing block, negative feedback arrangements comprising a gain control amplifier and a low-pass filter are respectively attached to the I and Q signal branches of the baseband block following mixer outputs. The gain control amplifier in each negative feedback circuit is gain adjusted so that the product G-B of the gain G of a primary gain control amplifier and its own gain B will be constant and thereby the DC offset is cancelled. This DC offset cancellation can be applied in a continuous receiving system with no intermittent time during a receiving operation. Capacitance elements located off-chip can be reduced to those to be used only in the low-pass filters in the negative feedback circuits, whereas many off-chip capacitance elements have been required to be inserted between each stage of gain control amplifiers in conventional baseband chains.

Claims (42)

1. A direct conversion receiver, comprising:

a pair of mixers which convert a receive signal frequency to a baseband frequency;

a baseband frequency signal processing block including a pair of first gain control amplifiers and a pair of first filters, following said mixers; and

a pair of DC offset cancellation circuits, each comprising:

an analog to digital converter which is connected to an output of one of said pair of first gain control amplifiers to convert analog signals to digital signals;

a digital processing circuit which detects a DC offset voltage out of output signals from said analog to digital converter and calculates a voltage to cancel the DC offset voltage; and

a digital to analog converter which converts a digital signal of the voltage calculated by the digital processing circuit into an analog signal of the voltage and supplies the analog signal of the voltage to said one of said pair of first gain control amplifiers,

wherein said baseband frequency signal processing block further includes a pair of negative feedback circuits with an adjustable feedback factor, each negative feedback circuit including a second filter of low-pass type,

wherein said direct conversion receiver performs DC offset cancellation by means of said pair of DC offset cancellation circuits when being powered on and, subsequently, performs DC offset cancellation by means of said pair of negative feedback circuits.

2. The direct conversion receiver according to claim 1 ,

wherein each said negative feedback circuit comprises a second amplifier and said second filter located, following an output end of the second amplifier.

3. The direct conversion receiver according to claim 2 ,

wherein said second amplifier is a gain control amplifier.

4. The direct conversion receiver according to claim 1 ,

wherein said second filter is a low-pass filter with an adjustable cut-off frequency.

5. A direct conversion receiver comprising:

a pair of mixers which convert a receive signal frequency to a baseband frequency; and

a baseband frequency signal processing block including a pair of first gain control amplifiers and a pair of first filters, following said mixers,

wherein said baseband frequency signal processing block further includes a pair of negative feedback circuits with an adjustable feedback factor, each negative feedback circuit including a second filter of low-pass type,

wherein said pair of first gain control amplifiers have multistage compositions in which a pair of first-stage amplifiers are a pair of static gain amplifiers to which a pair of DC offset cancellation circuits are attached respectively, each said DC offset cancellation circuit comprising:

an analog to digital converter which is connected to an output of one of said pair of first gain control amplifiers to convert analog signals to digital signals;

a digital processing circuit which detects a DC offset voltage out of output signals from said analog to digital converter and calculates a voltage to cancel the DC offset voltage; and

a digital to analog converter which converts a digital signal of the voltage calculated by the digital processing circuit into an analog signal of the voltage and supplies the analog signal of the voltage to said one of said pair of first gain control amplifiers,

wherein said pair of static gain amplifiers perform DC offset cancellation by means of said pair of DC offset cancellation circuits when said direct conversion receiver is powered on and, subsequently, DC offset cancellation is performed by means of said pair of negative feedback circuits.

6. A direct conversion receiver comprising:

a pair of mixers which convert a receive signal frequency to a baseband frequency; and

a baseband frequency signal processing block including a pair of first gain control amplifiers and a pair of first filters, following said mixers,

wherein said baseband frequency signal processing block further includes a pair of negative feedback circuits with an adjustable feedback factor, each negative feedback circuit including a second filter of low-pass type,

wherein each of said pair of first gain control amplifiers is made up of multiple stages of gain control amplifiers and a last-stage static gain amplifier and each said negative feedback circuit loops back to an output of a first-stage gain control amplifier.

7. The direct conversion receiver according to claim 6 ,

wherein each said negative feedback circuit comprises a second amplifier and said second filter located, following an output end of the second amplifier.

8. The direct conversion receiver according to claim 7 ,

wherein said second amplifier is a gain control amplifier.

9. A direct conversion receiver comprising:

a pair of mixers which convert a receive signal frequency to a baseband frequency; and

a baseband frequency signal processing block including a pair of first gain control amplifiers and a pair of first filters, following said mixers,

wherein said baseband frequency signal processing block further includes a pair of negative feedback circuits with an adjustable feedback factor, each negative feedback circuit including a second filter of low-pass type,

wherein said pair of first gain control amplifiers are pair of gain control amplifiers having circuitry in which a plurality of different resistance elements are located so as to connect to a common terminal of the emitter side of a couple of differential transistors and gain is changed in steps by switching on/off current flowing through the plurality of resistance elements.

10. The direct conversion receiver according to claim 9 ,

wherein each said negative feedback circuit comprises a second amplifier and said second filter located, following an output end of the second amplifier.

11. The direct conversion receiver according to claim 10 ,

wherein said second amplifier is a gain control amplifier.

Assignments (3)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
MERGER Recorded Sep 21, 2010
From: RENESAS TECHNOLOGY CORP.
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025026/0660 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 5, 2003
From: AKAMINE, YUKINORI; TANAKA, SATOSHI; YAMAMOTO, AKIO; HORI, KAZUAKI
To: RENESAS TECHNOLOGY CORP.
Reel/Frame 014777/0665 →