IP Library Granted Patent US 6,991,943
Granted Patent B2
US 6,991,943 · App. 10/728,482 · Granted Jan 31, 2006

Process for preparation of semiconductor wafer surface

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 6,991,943
App. No.
10/728,482
Granted
Jan 31, 2006
Kind
B2
Abstract

A method for adjusting the resistivity in the surface of a semiconductive substrate including selective measurement and counter-doping of areas on a major surface of a semiconductive substrate.

Claims (10)

1. A method for preparing the junction-receiving surface of a semiconductive substrate of one conductivity type which is to receive many identical devices or integrated circuits over its surface comprising:

mapping the resistivity of a major surface of a semiconductive substrate by selectively measuring the resistivity of discrete locations, said discrete locations covering all areas in a predetermined grid, said predetermined grid including an entirety of said major surface; and

counter-doping said locations to increase their resistivity to a substantially uniform resistivity based on said mapping.

2. The method defined in claim 1 , wherein said counter-doping step is performed by implanting ions.

3. The method defined in claim 2 , further comprising diffusing said ions to a desired depth.

4. The method defined in claim 1 , further comprising a step of comparing the measured resistivity of each of said discrete locations to a reference value and determining desired counter-doping for each discrete location based on said comparison.

5. The method defined in claim 1 , wherein said method is executed by a software.

6. The method defined in claim 1 , wherein said selective measurements are made by a non-contact probe.

7. The method defined in claim 1 , wherein said semiconductive substrate is comprised of silicon.

8. The method defined in claim 1 , wherein said semiconductive substrate is doped with N type dopants and counter-doped with P type dopants.

Assignments (1)
CHANGE OF NAME Recorded Jul 23, 2018
From: INTERNATIONAL RECTIFIER CORPORATION
To: INFINEON TECHNOLOGIES AMERICAS CORP.
Reel/Frame 046612/0968 →