IP Library Granted Patent US 7,054,516
Granted Patent B2
US 7,054,516 · App. 10/734,110 · Granted May 30, 2006

Integrated optical device

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Quick Facts
Patent No.
US 7,054,516
App. No.
10/734,110
Granted
May 30, 2006
Kind
B2
Abstract

An integrated optical device includes a substrate, at least a face of the substrate providing a first cladding layer, the first cladding layer including a mesa formation; a waveguide core formed on the first cladding layer so that the waveguide core substantially covers the mesa formation; and a second cladding layer formed over the waveguide core and the first cladding layer.

Claims (20)

1. A method of fabricating an integrated optical device on a substrate, at least a face of the substrate providing a first cladding layer, the method comprising the steps of: (i) forming a core material layer on the first cladding layer; (ii) etching the device in regions forming a complement of a desired waveguide core, the etching step removing material from the core material layer and at least some material from the first cladding layer so that the first cladding layer forms a mesa formation substantially covered by the waveguide core; and (iii) forming a second cladding layer over the first cladding layer and waveguide core; wherein the height of the mesa formation is selected so as to give a substantially zero birefringence in the waveguide core.

2. A method of fabricating an integrated optical device on a substrate, at least a face of the substrate providing a first cladding layer, the method comprising the steps of; (i) forming a core material layer on the first cladding layer; (ii) etching the device in regions forming a complement of a desired waveguide core, the etching step removing material from the core material layer and at least some material from the first cladding layer so that the first cladding layer forms a mesa formation substantially covered by the waveguide core; and (iii) forming a second cladding layer over the first cladding and waveguide core; wherein the height of the mesa formation is selected to give a desired reduced level of birefringence in the waveguide core.

3. A method according to claim 1 , in which the mesa formation has a height of at least 1 μm.

4. A method according to claim 3 , in which the mesa formation has a height of between about 2 μm and about 4 μm.

5. A method according to claim 1 , comprising the step, before step (i), of forming the first cladding layer on the substrate.

6. A method according to claim 5 , in which the substrate is a silicon substrate.

7. A method according to claim 5 , in which the first cladding layer is predominantly silicon dioxide.

8. A method according to claim 1 , in which the linear coefficient of expansion of the material of the second cladding layer is greater than that of the material of the core material layer.

9. A method according to claim 4 , wherein the mesa formation has a height of between 2.5.and 3.5 μm.

10. A method according to claim 1 , wherein the height of the mesa formation, the stress in the second cladding layer, and the width of the waveguide cores in a direction parallel to the plane of the substrate, are all selected so as to give a substantially zero birefringence in the waveguide core.

11. A method according to claim 10 , wherein the height of the mesa formation, the stress in the second cladding layer, the stress in the core, and the width of the waveguide cores in a direction parallel to the plane of the substrate, are all selected so as to give a substantially zero birefringence in the waveguide core.

12. A method according to claim 1 , wherein the stress in the second cladding layer is selected to be in the range of −20 to +10 MPascals.

13. A method according to claim 1 , wherein the width of the waveguide core in a direction parallel to the plane of the substrate is selected to be in the range of 5.80 to 6.20 μm.

14. A method according to claim 13 , wherein the width of the waveguide core in a direction parallel to the plane of the substrate is selected to be 6.0 μm.

15. A method according to claim 1 , wherein the value of at least one of the following parameters is selected in order to substantially compensate for variation in the birefringence of the waveguide core with temperature, so as to obtain substantially zero birefringence in the waveguide core at predetermined operating temperature of the device: height of the mesa formation; stress in the second cladding layer; stress in the core; width of the waveguide cores in a direction parallel to the plane of the substrate.

16. An integrated optical device comprising: a substrate, at least a face of the substrate providing a first cladding layer, the first cladding layer including a mesa formation; a waveguide core formed on the first cladding layer so that the waveguide core substantially covers the mesa formation; and a second cladding layer formed over the waveguide core and the first cladding layer; wherein the height of the mesa formation is such that there is substantially zero birefringence in the waveguide core.

17. An integrated optical device according to claim 16 , wherein the cross-section of the waveguide core has a substantially square shape.

18. An integrated optical device according to claim 16 , wherein the width of the mesa formation is equal to the width of the core.

19. An arrayed waveguide comprising: a substrate, at least a face of the substrate providing a first cladding layer, the first cladding layer including a mesa formation; a plurality of array waveguides provided on the substrate, each array waveguide having a waveguide core formed on the first cladding layer so that the waveguide core substantially covers the mesa formation; a second cladding layer formed over the waveguide cores and the first cladding layer; and wherein the height of the mesa formation is selected to give a reduced level of birefringence in the waveguide core and is in the range of about 2 to about 4 μm; the stress in the second cladding layer is in the range of −20 to +10 MPascals; and the width of the waveguide cores in a direction parallel to the plane of the substrate is in the range of 5.80 to 6.20 μm.

20. An arrayed waveguide grating according to claim 19 , wherein the width of the waveguide cores in a direction parallel to the plane of the substrate is in the range of 5.90 to 6.10 μm.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 3, 2019
From: GEMFIRE EUROPE LTD; KAIAM EUROPE LTD
To: BROADEX TECHNOLOGIES UK LTD.
Reel/Frame 049343/0634 →
CHANGE OF NAME Recorded Jan 20, 2006
From: ALCATEL OPTRONICS UK LIMITED
To: AVANEX U.K. LIMITED
Reel/Frame 017204/0705 →
CHANGE OF NAME Recorded Jan 20, 2006
From: AVANEX U.K. LIMITED
To: GEMFIRE EUROPE LIMITED
Reel/Frame 017328/0981 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 25, 2004
From: CHILDS, RUSSELL; VOLANTHEN, MARK; BOS, JOHANNES; ORTEGA GONZALEZ, DANIEL; GORDON, GRAEME; PUJOL, ANOTINE
To: ALCATEL OPTRONICS UK LIMITED
Reel/Frame 015011/0738 →