Information processing apparatus for secure information recovery
View Patent ↗In an information processing apparatus for performing user certification when an OS starts based on security key information of security hardware, a need has arisen to restore the security key information before replacement of the security hardware replaced for troubleshooting. A cancellation means is generated in a second system status generated by a functionally restricted second type OS start such as a safe mode. Although the user certification based on the security key information of the security hardware is usually performed in a first type OS start, the cancellation means cancels it. Thus, it is possible to put the information processing apparatus in a first system status without undergoing the user certification so as to restore the security key information. A cancel release means releases cancellation of the user certification so that the user certification on the first type OS start is restored after the restoration of the security key information.
1. An information processing apparatus comprising:
security hardware for storing security key information;
OS start admission circuit for, in response to an operating system attempting to start, determining whether or not an input data for user certification is valid based on said security key information read from said security hardware, and permitting said operating system to start when said determination result is positive;
security key information restoration circuit for restoring security key information in said security hardware based on predetermined data for restoration, wherein said predetermined data for restoration is generated when generating said security key information within said security hardware in order to render said security key information freely restorable and is stored in an auxiliary storage;
OS start type selection circuit for selectively executing either a first type OS start to generate a first system status in which said security key information restoration circuit can operate said OS start admission circuit, or a second type OS start to generate a second system status in which said security key information restoration circuit cannot operate said OS start admission circuit;
cancellation circuit, generated during said second system status, for canceling the operation of said OS start admission circuit as to said first type OS start; and
cancel release circuit for releasing cancellation of the operation of said OS start admission circuit by said cancellation circuit after said first type OS start having the operation of said OS start admission circuit canceled by said cancellation circuit has been executed at least once.
2. The information processing apparatus of claim 1 , wherein said input data for user certification is data keyed in by an user on said first type OS start.
3. The information processing apparatus of claim 1 , wherein said first and second type OS starts are the starts based on same OS stored in the same auxiliary storage, and when starting said operating system, said OS start type selection circuit detects whether or not a predetermined user operation is performed so as to select and execute said first type OS start or said second type OS start.
4. The information processing apparatus of claim 1 , wherein said first and second type OS starts are starts based on two operating systems, each being stored in a different auxiliary storage, and when a second operating system is readable from said auxiliary storage storing said second operating system, said OS start type selection circuit selects and executes said second type OS start in preference over said first type OS start.
5. The information processing apparatus of claim 1 , wherein said information processing apparatus further includes erasure release circuit for erasing said cancel release circuit after said cancel release circuit releases the cancellation of the operation of said OS start admission circuit means by said cancellation circuit.
6. The information processing apparatus of claim 5 , wherein said erasure circuit is generated by said cancel release circuit.