Semiconductor device
View Patent ↗A semiconductor device includes a substrate which has a main surface and an alignment mark which is formed on the main surface and which has a pattern, wherein the pattern in a plane view has a shape that is obtained by eliminating corners from a polygon.
1. A semiconductor device comprising:
a substrate which has a main surface;
an alignment mark which is formed on the main surface and which has a pattern, wherein the pattern in a plane view has a shape that is obtained by eliminating corners from a polygon; and
strips of oxidation prevention cover film that are respectively aligned above the alignment mark, that are separated from each other, and that are disposed in the shape of the pattern.
2. The semiconductor device as claimed in claim 1 , wherein the polygon is a rectangle.
3. The semiconductor device as claimed in claim 1 , wherein a width of the pattern of the alignment mark ranges from 0.6 μm to 0.8 μm.
4. The semiconductor device as claimed in claim 1 , wherein the alignment mark is a metal film.
5. The semiconductor device as claimed in claim 1 , wherein a width of the strips oxidation prevention cover film is 1 μm to several μm wider at one side than a width of the pattern of the alignment mark.
6. The semiconductor device as claimed in claim 1 , wherein the strips of oxidation prevention cover film are formed of iridium-based metal.
7. A semiconductor device comprising:
a substrate which has a main surface;
an alignment mark which is formed on the main surface and which has first through fourth mark portions,
wherein the first through fourth mark portions are arranged in a pattern so that the first and second mark portions oppose each other, the third and fourth mark portions oppose each other, and the first through fourth mark portions are separated from one another; and
first through fourth sections of oxidation prevention cover film respectively formed as separated from each other and aligned directly above the first through fourth mark portions in the pattern.
8. The semiconductor device as claimed in claim 7 , wherein a width of the first through fourth mark portions of the alignment mark ranges from 0.6 μm to 0.8 μm.
9. The semiconductor device as claimed in claim 7 , wherein the alignment mark comprises a metal film.
10. The semiconductor device as claimed in claim 7 , wherein a width of the first through fourth sections of oxidation prevention cover film is 1 μm to several μm wider at one side than a width of the first through fourth mark portions of the alignment mark.
11. The semiconductor device as claimed in claim 7 , wherein the oxidation prevention cover films are formed of iridium-based metal.
12. A semiconductor device comprising:
a substrate having a main surface;
an alignment mark on the main surface of the substrate, wherein the alignment mark is strip-like and has a shape of a polygon without corners along a plane parallel to the main surface of the substrate; and
an oxidation prevention cover film aligned directly above the alignment mark, wherein the oxidation prevention cover film is a closed-loop strip and has the shape of the polygon.
13. The semiconductor device of claim 12 , wherein the polygon is a rectangle.
14. The semiconductor device of claim 13 , wherein the oxidation prevention cover film has rectangular shape.
15. The semiconductor device of claim 12 , wherein the alignment mark has a width ranging from 0.6 μm to 0.8 μm.
16. The semiconductor device of claim 12 , wherein a width of the oxidation prevention cover film is 1 μm to several μm wider than a width of the alignment mark.
17. The semiconductor device of claim 12 , wherein the alignment mark is a metal film.
18. The semiconductor device of claim 12 , wherein the oxidation prevention cover film is an iridium based metal.