Apparatus for providing regulated power to an integrated circuit
View Patent ↗A regulator system for supplying power to a microelectronic device is disclosed. The system includes an array of a plurality of regulators, where each regulator provides a portion of power required to operate the device. The system may further include an intermediate power regulator that supplies power to the array of regulators.
1. A tiered power regulation system for supplying high current at high speed and low voltage comprising:
a first tier having a first power regulator; and
a second tier having an array comprising a plurality of second power regulators, said second power regulators configured to respond to a load power demand rate greater than said first power regulator responds to power demands,
wherein said array comprising a plurality of second power regulators is configured to couple to a plurality of portions of a microprocessor.
2. The tiered power regulation system of claim 1 , wherein said regulator array is coupled to said microprocessor using bump technology.
3. The tiered power regulation system of claim 1 , wherein said regulator array is formed using a compound semiconductor substrate.
4. The tiered power regulation system of claim 1 , wherein said first regulator is a switching regulator.
5. The tiered power regulation system of claim 1 , wherein said second power regulators are coupled together in parallel.
6. The tiered power regulation system of claim 1 , wherein said first regulator provides power to said array and to said microprocessor.
7. The tiered power regulation system of claim 1 , further comprising electronic components coupled to said microprocessor, said components configured to provide power to said microprocessor.
8. The tiered power regulation system of claim 1 , wherein said array is coupled in parallel to said first regulator and to said microprocessor.
9. A tiered power regulation system for supplying high current at high speed and low voltage comprising:
a first tier having a first power regulator;
a second tier having a microelectronic device formed on a first substrate; and
an array of second power regulators formed on a second substrate, said second power regulators configured to respond to a load power demand rate greater than said first power regulator responds to power demands.
10. The tiered power regulation system of claim 9 , wherein said microelectronic device and said array are coupled together using bump technology.
11. The tiered power regulation system of claim 9 , wherein the first power regulator is a Buck regulator.
12. The tiered power regulation system of claim 9 , wherein the microelectronic device comprises a microprocessor.
13. The tiered power regulation system of claim 9 , wherein the second substrate comprises compound semiconductor material.
14. The tiered power regulation system of claim 9 , wherein said second power regulators are coupled together in parallel.
15. The tiered power regulation system of claim 9 , wherein said first regulator provides power to said array and to said microelectronic device.
16. The tiered power regulation system of claim 9 , further comprising electronic components coupled to said microelectronic device, said components configured to provide power to said microelectronic device.
17. The tiered power regulation system of claim 9 , wherein said array is coupled in parallel to said first regulator and to said microelectronic device.
18. A tiered power regulation system for supplying high current at high speed and low voltage comprising:
a first tier having a first power regulator;
a microelectronic device formed on a first substrate; and
a second tier having an array of second power regulators formed on a second substrate, said second power regulators configured to respond to a load power demand rate greater than said first power regulator responds to power demands,
wherein said array is coupled in parallel to said microelectronic device using bump technology.