IP Library Granted Patent US 7,202,115
Granted Patent B2
US 7,202,115 · App. 10/745,419 · Granted Apr 10, 2007

Thin film transistor, its manufacture method and display device

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Quick Facts
Patent No.
US 7,202,115
App. No.
10/745,419
Granted
Apr 10, 2007
Kind
B2
Abstract

On an insulating substrate, a first insulating buffer layer, a heat accumulating-light shielding layer having at least a silicon layer on the surface thereof, a second insulating buffer layer and a first silicon layer are laminated in the order recited from the bottom. The lamination structure of the heat accumulating-light shielding layer, second buffer layer and first silicon layer is patterned. A laser beam is applied the patterned first silicon layer to melt and crystallize the first silicon layer. A thin film transistor is formed by using the crystallized first silicon layer. A polysilicon thin film transistor of high performance and small leak current to be caused by light as well as a display device using such thin film transistors is provided.

Claims (8)

1. A method of manufacturing a thin film transistor comprising the steps of:

(e) laminating a first insulating buffer layer, a first silicon layer, a second insulating buffer layer and a second silicon layer on an insulating substrate in a recited order from a bottom;

(f) removing said second silicon layer and said second insulating buffer layer in a first area to expose said first silicon layer;

(g) patterning a lamination structure of said second insulating buffer layer and said second silicon layer in a second area;

(h) applying a pulsated laser beam to said exposed first silicon layer in the first area to crystallize said first silicon layer in the first area;

(i) applying a continuously oscillating laser beam to said patterned second silicon layer in the second area to melt, solidify and crystallize said second silicon layer in the second area; and

(j) forming thin film transistors by using said crystallized first and second silicon layers.

2. The method of manufacturing a thin film transistor according to claim 1 , wherein in said step (e) said first silicon layer is formed thinner than said second silicon layer.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2005
From: FUJITSU LIMITED
To: SHARP KABUSHIKI KAISHA
Reel/Frame 016345/0210 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 13, 2005
From: FUJITSU DISPLAY TECHNOLOGIES CORPORATION
To: FUJITSU LIMITED
Reel/Frame 016345/0310 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 22, 2003
From: HIRANO, TAKUYA; WATANABE, TAKUYA
To: FUJITSU DISPLAY TECHNOLOGIES CORPORATION
Reel/Frame 014853/0391 →