IP Library Granted Patent US 6,842,164
Granted Patent B2
US 6,842,164 · App. 10/747,450 · Granted Jan 11, 2005

Display device

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Quick Facts
Patent No.
US 6,842,164
App. No.
10/747,450
Granted
Jan 11, 2005
Kind
B2
Abstract

In a liquid crystal display comprising a plurality of pixels each of which has an switching element, a plurality of drain drivers and gate drivers for operating the switching elements and the pixels, and a plurality of drain lines and gate lines supplying signals from the drain drivers and the gate drivers to the switching elements being formed on one of a pair of substrates sandwiching a liquid crystal layer, the present invention provides wiring lines formed on the one of a pair of substrates for transferring display data signals and a clock signal between each pair of the plurality of drain drivers adjacent to one another, and provides at least one gate circuit for at least one of the plurality of drain drivers which is controlled by the clock signal and switches the display data signals and the clock signal either (1) to be acquired by the at least one of the plurality of drain drivers or (2) to be transferred to another of the plurality of drain drivers arranged adjacent to the at least one of the plurality of drain drivers. This liquid crystal display device has an advantage, for instance, or of suppressing electromagnetic interference (EMI) to another equipment surrounding the liquid crystal display device, of preventing the display data signals or the clock signal from being distorted in the wiring lines.

Claims (25)

1. A display device comprising:

a substrate having a plurality of gate lines extended in a first direction, a plurality of drain lines extended in a second direction transverse to the first direction, and a plurality of pixels having switching elements respectively and being arranged along the first direction and the second direction;

a plurality of drain driver circuits being provided along the first direction on a first periphery of the substrate and each applying gray scale voltage signals on the basis of display data signals acquired thereby to the switching elements of a group of the plurality of pixels corresponding thereto through a group of the plurality of drain lines connected thereto,

a plurality of gate driver circuits being provided along the second direction on a second periphery of the substrate adjacent to the first periphery of the substrate and controlling the switching elements of the plurality of pixels through the plurality of gate lines respectively,

first data lines formed on the first periphery of the substrate, each of which connects a respective pair of the plurality of drain driver circuits adjacent to each other to transfer the display data signals from a first one of the plurality of drain driver circuits at one end of the first periphery of the substrate to a last one of the plurality of drain driver circuits at another end of the first periphery of the substrate sequentially in serial;

second data lines formed on the second periphery of the substrate and transferring scanning clock signals between respective pairs of the plurality of gate driver circuits sequentially in serial; and

a flexible printed substrate comprising a drain driver power supply line section and an interface wiring section, wherein

the drain driver power supply line section has a drain driver power supply line formed thereon to be extended along the first periphery of the substrate and connected to each of the plurality of drain driver circuits, and

the interface wiring section is arranged at the one end of the first periphery of the substrate, and has an extension of the drain driver power supply line, a first data connecting line connected to one of the first data lines, and a first data connecting line connected to one of the second data lines, each formed thereon.

2. A display device according to claim 1 , wherein the plurality of drain driver circuits are arranged along the first direction on the first periphery of the substrate and respective pair of the plurality of drain drivers adjacent to each other are connected by the first data lines.

3. A display device according to claim 1 , wherein the first data lines includes display data lines, pixel clock lines and gray scale voltage lines each connecting the plurality of drain driver circuits with one another.

4. A display device according to claim 1 further comprising another substrate bonded to substrate, wherein a liquid crystal layer is sealed between both the substrate and the another substrate.

5. A display device according to claim 1 , wherein the drain driver power supply line section and the interface wiring section are integrated into the flexible printed substrate.

6. A display device comprising:

a substrate having a plurality of gate lines extended in a first direction, a plurality of drain lines extended in a second direction transverse to the first direction, and a plurality of pixels having switching elements respectively and being arranged along the first direction and the second direction;

a plurality of drain driver circuits being provided along the first direction on a first periphery of the substrate and each applying gray scale voltage signals on the basis of display data signals acquired thereby to the switching elements of a group of the plurality of pixels corresponding thereto through a group of the plurality of drain lines connected thereto,

a plurality of gate driver circuits being provided along the second direction on a second periphery of the substrate adjacent to the first periphery of the substrate and controlling the switching elements of the plurality of pixels through the plurality of gate lines respectively,

first data lines formed on the first periphery of the substrate, each of which connects a respective pair of the plurality of drain driver circuits adjacent to each other to transfer the display data signals from a first one of the plurality of drain driver circuits at one end of the first periphery of the substrate to a last one of the plurality of drain driver circuits at another end of the first periphery of the substrate sequentially in serial;

second data lines formed on the second periphery of the substrate and transferring scanning clock signals between respective pairs of the plurality of gate driver circuits sequentially in serial;

a first flexible printed substrate having drain data connecting lines formed thereat and connected to the first data lines and gate data connecting lines formed thereat and connected to the second data lines, and

a second flexible printed substrate extended along the first periphery of the substrate from the second periphery of the substrate to overlap with the first periphery and having drain driver power source lines formed thereat and connected to each of the plurality of drain driver circuits.

7. A display device according to claim 6 , wherein the second flexible printed substrate has an extension extended along the first direction from the second periphery of the substrate to an outside of the substrate, and an connector of the drain driver power source lines is provided to a distal end of the extension of the second flexible printed substrate.

8. A display device according to claim 6 , wherein the plurality of drain driver circuits are arranged along the first direction on the first periphery of the substrate and respective pair of the plurality of drain drivers adjacent to each other are connected by the first data lines.

9. A display device according to claim 6 , wherein the first data lines includes display data lines, pixel clock lines and gray scale voltage lines each connecting the plurality of drain driver circuits with one another.

10. A display device according to claim 6 , wherein the second flexible printed substrate has only the drain driver power source lines formed thereat.

Assignments (5)
COMPANY SPLIT PLAN TRANSFERRING FIFTY (50) PERCENT SHARE OF PATENTS AND PATENT APPLICATIONS Recorded Dec 12, 2011
From: HITACHI DISPLAYS, LTD.
To: IPS ALPHA SUPPORT CO., LTD.
Reel/Frame 027362/0466 →
COMPANY SPLIT PLAN TRANSFERRING ONE HUNDRED (100) PERCENT SHARE OF PATENT AND PATENT APPLICATIONS Recorded Dec 12, 2011
From: HITACHI, LTD.
To: HITACHI DISPLAYS, LTD.
Reel/Frame 027362/0612 →
MERGER/CHANGE OF NAME Recorded Dec 12, 2011
From: IPS ALPHA SUPPORT CO., LTD.
To: PANASONIC LIQUID CRYSTAL DISPLAY CO., LTD.
Reel/Frame 027363/0315 →
MERGER Recorded Jun 23, 2011
From: HITACHI DEVICE ENGINEERING CO., LTD.
To: HITACHI DISPLAYS, LTD.
Reel/Frame 026481/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 30, 2003
From: IMAJO, YOSHIHIRO; IZAWA, TETSURO; OHGIICHI, KIMITOSHI; OKAWARA, HIROSHI; UEDA, SHIRO; ISHIGE, NOBUYUKI; KAWAMURA, TETSUYA; ISHINO, HISASHI; KOMORI, FUMAIKI
To: HITACHI, LTD.; HITACHI DEVICE ENGINEERING CO., LTD.
Reel/Frame 014859/0085 →