Hetero-junction bipolar transistor and manufacturing method thereof

1. A hetero-junction bipolar transistor comprising:

an n-type sub-collector layer that is made of GaAs;

an n-type first collector layer that is made of a semiconductor material with a smaller avalanche coefficient than an avalanche coefficient of the sub-collector layer and that is formed on the sub-collector layer;

a second collector layer that is made of one of n-type and i-type GaAs with lower dopant concentration than dopant concentration of the sub-collector layer and that is formed on the first collector layer;

a p-type base layer that is made of GaAs and that is formed on the second collector layer; and

an n-type emitter layer that is made of a semiconductor material with a larger band gap than a band gap of the base layer and that is formed on the base layer.

2. The hetero-junction bipolar transistor according to claim 1 ,

wherein a dopant concentration of the first collector layer is 1×10 17 cm −3 or more.

3. The hetero-junction bipolar transistor according to claim 1 ,

wherein a thickness of the first collector layer is under 200 nm.

4. The hetero-junction bipolar transistor according to claim 1 ,

wherein a dopant has a concentration characteristic where the concentration becomes lower in direction from an interface between the first collector layer and the sub-collector layer to an interface between the first collector layer and the second collector layer.

5. The hetero-junction bipolar transistor according to claim 1 , further comprising a semiconductor layer that is formed between the first collector layer and the second collector layer,

wherein the semiconductor layer reduces discontinuity of a conduction band between the first collector layer and the second collector layer.

6. The hetero-junction bipolar transistor according to claim 5 ,

wherein the semiconductor layer is an n-type spacer layer that is made of the same semiconductor material as the first collector layer or the second collector layer, and the semiconductor layer has a dopant concentration of 1×10 18 cm −3 or less.

7. The hetero-junction bipolar transistor according to claim 5 ,

wherein the semiconductor layer includes:

an n-type first spacer layer that is made of the same semiconductor material as the first collector layer, has a dopant concentration of 1×10 18 cm −3 or less and is in contact with the first collector layer; and

an n-type second spacer layer that is made of the same semiconductor material as the second collector layer, has a dopant concentration of 1×10 18 cm −3 or less and is in contact with the second collector layer.

8. The hetero-junction bipolar transistor according to claim 1 ,

wherein the first collector layer is made of In x Ga 1-x P (0.47≦x≦0.52).

9. The hetero-junction bipolar transistor according to claim 8 ,

wherein the first collector layer has a disordered structure.

10. The hetero-junction bipolar transistor according to claim 1 ,

wherein the emitter layer is made of In x Ga 1-x P (0.47≦x≦0.52).

11. The hetero-junction bipolar transistor according to claim 1 ,

wherein the first collector layer is made of Al y Ga 1-y As (0≦y≦1).

12. The hetero-junction bipolar transistor according to claim 11 ,

wherein a composition ratio y of Al in the first collector layer gradually changes in direction from the interface between the first collector layer and the sub-collector layer to the interface between the first collector layer and the second collector layer.

13. The hetero-junction bipolar transistor according to claim 11 ,

wherein the emitter layer is made of Al y Ga 1-y As (0≦y≦1).