IP Library Granted Patent US 7,148,101
Granted Patent B2
US 7,148,101 · App. 10/758,346 · Granted Dec 12, 2006

Capacitors of semiconductor devices and methods of fabricating the same

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Quick Facts
Patent No.
US 7,148,101
App. No.
10/758,346
Granted
Dec 12, 2006
Kind
B2
Abstract

Capacitors of semiconductor devices and methods of fabricating the same are disclosed. An example capacitor-fabricating method comprises: forming a first insulating layer by nitrifying a semiconductor substrate; forming a second insulating layer by depositing a transition element on the first insulating layer and performing a reoxidation process; forming a third insulating layer by nitrifying the second insulating layer using a forming gas; and forming a conducting layer on top of the third insulating layer.

Claims (23)

1. A method for fabricating a capacitor of a semiconductor device comprising:

forming a first insulating layer by nitrifying a semiconductor substrate using a forming gas;

forming a second insulating layer by depositing a transition element on the first insulating layer and performing a reoxidation process;

forming a third insulating layer by nitrifying the second insulating layer using a forming gas; and

forming a conducting layer on top of the third insulating layer.

2. A method as defined in claim 1 , wherein a conducting layer is formed on the semiconductor substrate prior to forming the first insulating layer.

3. A method as defined in claim 1 , wherein the forming gas comprises N 2 gas or a gas mixture including N 2 .

4. A method as defined in claim 1 , wherein at least one of the first insulating layer, the second insulating layer, and the third insulating layer is formed using a furnace process.

5. A method as defined in claim 4 , wherein the furnace process is performed at a temperature of about 200˜450° C.

6. A method as defined in claim 1 , wherein the transition element is one of Ta, Al, Zr, V, Ti, Ni and Hf.

7. A method as defined in claim 1 , wherein the transition element is deposited by PVD or CVD.

8. A method as defined in claim 1 , wherein the reoxidation process is performed at a temperature of about 700˜950° C. by a rapid thermal treatment method.

9. A method as defined in claim 1 , wherein the second insulating layer has a thickness of about 5˜500 Å.

10. A method as defined in claim 1 , wherein the conducting layer comprises one of: polysilicon, Si, Al, V, Ni, Cu, Co, W, Ta, Ti, and an alloy comprising at least one of polysilicon, Si, Al, V, Ni, Cu, Co, W, Ta, and Ti.

11. A method as defined in claim 1 , wherein the conducting layer is formed by PVD or CVD.

12. A method as defined in claim 1 , wherein the substrate includes at least a predetermined capacitor structure.

13. A method for fabricating a capacitor of a semiconductor device comprising:

forming a first insulating layer by nitrifying a semiconductor substrate using a forming gas;

forming a second insulating layer including a transition element oxide on the first insulating layer;

forming a third insulating layer by nitrifying the second insulating layer using a forming gas; and

forming a conducting layer on top of the third insulating layer.

14. A method as defined in claim 13 , wherein forming the second insulating layer comprises performing CVD.

15. A method as defined in claim 13 , wherein the second insulating layer comprises an oxide of one of Ta, Al, Zr, V, Ti, Ni, and Hf.