Semiconductor integrated circuit device and method for manufacturing the same
View Patent ↗A manufacturing method for a semiconductor integrated circuit device comprises forming, over a gate insulating film which has been formed over the main surface of a single crystal silicon substrate to have an effective film thickness less than 5 nm in terms of SiO 2 , a W film as a gate electrode material, and heat treating the silicon substrate in a water-vapor- and hydrogen-containing gas atmosphere having a water vapor/hydrogen partial pressure ratio set at a ratio permitting oxidation of silicon without substantial oxidation of the W film, whereby defects of the gate insulating film right under the W film are repaired. In this way, in a MISFET having a metal gate electrode formed over a ultra-thin gate insulating film having an effective film thickness less than 5 nm in terms of SiO 2 , defects of the gate insulating film can be repaired without oxidizing the metal gate electrode.
1. A process for manufacturing a semiconductor integrated circuit device, which comprises the steps of:
(a) forming, over the silicon surface on a main surface of a wafer, an insulating film having an effective film thickness less than 5 nm in terms of SiO 2 and made of a single insulating film containing silicon oxide as a principal component or a composite film thereof with another insulating film;
(b) forming, over the insulating film, a metal film containing a refractory metal as a principal component without disposing, therebetween, an intermediate layer containing polycrystalline silicon as a principal component;
(c) heat treating the wafer in a water-vapor- and hydrogen-containing gas atmosphere having a water vapor/hydrogen partial pressure ratio set at a ratio permitting oxidation of silicon without substantial oxidation of the refractory metal; and
(d) after step (c), patterning the metal film to form a metal gate electrode.
2. The process according to claim 1 , wherein the refractory metal is molybdenum or tungsten.
3. A processing according to claim 1 , wherein the insulating film has an effective film thickness less than 4 nm in terms of SiO 2 .
4. A process according to claim 1 , wherein the insulating film has an effective film thickness less than 3 nm in terms of SiO 2 .
5. A process for manufacturing a semiconductor integrated circuit device, which comprises the steps of:
(a) forming, over the silicon surface on a main surface of a wafer, an insulating film having an effective film thickness less than 5 nm in terms of SiO 2 and made of a single insulating film containing silicon nitride as a principal component or a composite film thereof with another insulating film;
(b) forming, over the insulating film, a metal film containing a refractory metal as a principal component without disposing, therebetween, an intermediate layer containing polycrystalline silicon as a principal component;
(c) heat treating the wafer in a water-vapor- and hydrogen-containing gas atmosphere having a water vapor/hydrogen partial pressure ratio set at a ratio permitting oxidation of silicon without substantial oxidation of the refractory metal; and
(d) after step (c), patterning the metal film to form a metal gate electrode.
6. A process according to claim 5 , wherein the refractory metal is molybdenum or tungsten.
7. A process according to claim 5 , wherein the water-vapor- and hydrogen-containing gas further contains a nitrogen or ammonia gas.
8. A process for manufacturing a semiconductor integrated circuit device, which comprises the steps of:
(a) forming, over the silicon surface on a main surface of a wafer, an insulating film having an effective film thickness less than 5 nm in terms of SiO 2 and made of a single insulating film containing as a principal component a metal oxide having a dielectric constant larger than silicon dioxide or a composite film thereof with another insulating film;
(b) forming, over the insulating film, a metal film containing a refractory metal as a principal component without disposing, therebetween, an intermediate layer containing polycrystalline silicon as a principal component;
(c) heat treating the wafer in a water-vapor- and hydrogen-containing gas atmosphere having a water vapor/hydrogen partial pressure ratio set at a ratio permitting oxidation of the material of the insulating film without substantial oxidation of the refractory metal; and
(d) after step (c), patterning the metal film to form a metal gate electrode.
9. A process according to claim 8 , wherein the metal constituting the metal oxide film is titanium, zirconium or hafnium.
10. A process according to claim 8 , wherein the metal constituting the metal oxide film is tantalum.
11. A process according to claim 8 , wherein the metal constituting the metal oxide film is aluminum.
12. A process according to claim 8 , wherein the metal oxide film is a high dielectric substance including a ABO 3 type average perovskite structure and is in a paraelectric phase at an operating temperature.
13. A process according to claim 12 , wherein the high dielectric substance is barium strontium titanate.