IP Library Granted Patent US 7,009,454
Granted Patent B2
US 7,009,454 · App. 10/760,698 · Granted Mar 7, 2006

Method and apparatus for optimization of amplifier with adjustable output range

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Quick Facts
Patent No.
US 7,009,454
App. No.
10/760,698
Granted
Mar 7, 2006
Kind
B2
Abstract

A method and apparatus for an amplifier, such as a radio frequency amplifier embodied as an integrated circuit is disclosed. Embodiments provide for a wide range of operating powers with good energy efficiency at many power levels. Resonant components act to provide consistent operating parameters over the wide range of power levels used. The invention may operate in the microwave region or at other RFs.

Claims (24)

1. A method for amplifying comprising:

operating a first amplifier comprising a first active device supplying a first signal to a first matching network, the first matching network producing a first output, the first matching network including a first set of devices having a first resonance at a normal operating frequency of the circuit; and

operating a second amplifier comprising a second active device supplying a second signal to a second matching network, the second matching network producing a second output, the second matching network including a second set of devices having a second resonance at the normal operating frequency of the circuit;

wherein the respective outputs of the first and second amplifiers are summed at a summing node to produce a summed signal and,

wherein a circuit output signal is derived from the summed signal and,

wherein the method has at least a first operating mode and a second operating mode and,

wherein whenever the method is in the first operating mode:

the first and second active devices are biased to be active and turned on and,

wherein whenever the method is in the second operating mode:

the second active device is biased into at least a partially cutoff condition and the second matching network presents high impedance at the summing node, the high impedance being caused by the second resonance at the normal operating frequency;

wherein the first matching network is a high-pass “π” match structure;

whereby the circuit operates with high efficiency and higher power in the first operating mode and the circuit operates with high efficiency and lower power in the second operating mode.

2. A circuit for amplifying comprising:

a first amplifier comprising a first active device supplying a first signal to a first matching network, the first matching network producing a first output, the first matching network including a first set of devices having a first resonance at a normal operating frequency of the circuit; and

a second amplifier comprising a second active device supplying a second signal to a second matching network, the second matching network producing a second output, the second matching network including a second set of devices having a second resonance at the normal operating frequency of the circuit;

wherein the respective outputs of the first and second amplifiers are summed at a summing node to produce a summed signal and,

wherein a circuit output signal is derived from the summed signal and,

wherein the circuit has at least a first operating mode and a second operating mode and,

wherein whenever the circuit is in the first operating mode:

the first and second active devices are biased to be active and turned on and,

wherein whenever the circuit is in the second operating mode:

the second active device is biased into at least a partially cutoff condition and the second matching network presents high impedance at the summing node, the high impedance being caused by the second resonance at the normal operating frequency;

wherein the first matching network is a high-pass “π” match structure

whereby the circuit operates with high efficiency and higher power in the first operating mode and the circuit operates with high efficiency and lower power in the second operating mode.

Assignments (9)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 24, 2017
From: II-VI OPTOELECTRONIC DEVICES, INC.
To: SKYWORKS SOLUTIONS, INC.
Reel/Frame 042551/0708 →
CHANGE OF NAME Recorded May 1, 2017
From: ANADIGICS, INC.
To: II-VI OPTOELECTRONIC DEVICES, INC.
Reel/Frame 042381/0761 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ERRONEOUS NUMBER 6790900 AND REPLACE IT WITH 6760900 PREVIOUSLY RECORDED ON REEL 034056 FRAME 0641. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT. Recorded Nov 21, 2016
From: ANADIGICS, INC.
To: SILICON VALLEY BANK
Reel/Frame 040660/0967 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE'S NAME PREVIOUSLY RECORDED AT REEL: 037973 FRAME: 0226. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT. Recorded May 18, 2016
From: ANADIGICS, INC.
To: II-VI INCORPORATED
Reel/Frame 038744/0835 →
RELEASE OF SECURITY INTEREST Recorded Mar 16, 2016
From: II-VI INCORPORATED
To: ANADIGICS, INC.
Reel/Frame 038119/0312 →
INTELLECTUAL PROPERTY SECURITY AGREEMENT Recorded Mar 1, 2016
From: ANADIGICS, INC.
To: II-IV INCORPORATED
Reel/Frame 037973/0226 →
RELEASE OF SECURITY INTEREST Recorded Mar 1, 2016
From: SILICON VALLEY BANK
To: ANADIGICS, INC.
Reel/Frame 037973/0133 →
SECURITY AGREEMENT Recorded Oct 27, 2014
From: ANADIGICS, INC.
To: SILICON VALLEY BANK
Reel/Frame 034056/0641 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 20, 2004
From: RATEGH, HAMID REZA; SOLTAN, MEHDI FREDERICK
To: ANADIGICS INC. A DELAWARE CORPORATION
Reel/Frame 014912/0394 →