Semiconductor package suitable for high voltage applications
View Patent ↗A semiconductor package has a structure in which a leadframe pad to which a semiconductor die is attached and inner leads electrically connected to the leadframe pad are covered by a molded housing, and outer leads extending from the inner leads protrude from a side surface of the molded housing to the outside. The outer leads include a first outer lead disposed in a central portion of the molded housing, second and third outer leads respectively disposed in a right and left of the first outer lead. The second and third outer leads each have bent portions in portions where they are adjacent to the side surface of the molded housing, the bent portions protruding to increase a space between the first outer lead and the bent portions in the molded housing. At least one of the bent portions of the second and third outer leads is covered by an extended portion of the molded housing.
1. A packaged semiconductor device comprising:
a semiconductor die;
a leadframe pad for supporting the semiconductor die;
a molded housing encapsulating the leadframe pad and semiconductor die;
a plurality of elongated leads each having an inner portion extending from a first end inside the molded housing, protruding through a side surface of the molded housing and terminating at a second end outside the housing to form an outer portion of each lead,
wherein a second lead is opposite to a third lead, wherein a first lead is disposed between the opposing second lead and third lead,
wherein the second and third leads each have a bent region along their respective lengths, said bent regions being adjacent to the side surface of the molded housing, the bent region formed to increase a space between the first outer lead and the second and third leads,
wherein the molded housing outside the side surface is formed entirely on at least one of the bent regions of the second and third leads, the molded housing formed on the bent region having a inner wall on the contour of the bent region, an outer wall spaced from the inner wall following the contours of the bent region, and an end wall.
2. The semiconductor package of claim 1 , wherein a distance between a surface of the molded housing covering the portion of the first outer lead and a surface of the molded housing covering the bent region of the second and third outer leads is 1 mm or more.
3. The semiconductor package of claim 1 , wherein a depression which is depressed toward a body of the molded housing is formed on at least one of a surface of the molded housing between the first outer lead and the second outer lead and a surface of the molded housing between the first outer lead and the third outer lead.
4. A semiconductor package in which a leadframe pad to which a semiconductor die is attached and inner leads electrically connected to the leadframe pad are covered by a molded housing, and outer leads extended from the inner leads protrude from a side surface of the molded housing to the outside,
wherein a second lead is opposite to a third lead,
wherein a first lead is disposed between the opposing second and third leads,
wherein the second and third leads each have a bent region along their respective lengths, said bent regions being adjacent to the side surface of the molded housing, the bent regions formed to increase a space between the first outer lead and the bent regions of the second and third leads,
wherein the molded housing is formed entirely on at least one of the bent regions of the second and third leads, the molded housing formed on the bent region having an inner wall on the contour of the bent region, an outer wall spaced from the inner wall following the contours of the bent region, and an end wall.
5. The semiconductor package of claim 4 , wherein a portion where the first outer lead is adjacent to the side surface of the molded housing and is covered by the extended portion of the molded housing.
6. The semiconductor package of claim 5 , wherein a distance between a surface of the molded housing covering the portion of the first outer lead and a surface of the molded housing covering the bent regions of the second and third outer leads is 1 mm or more.
7. The semiconductor package of claim 4 , wherein a depression which is depressed toward a body of the molded housing is formed on at least one of a surface of the molded housing between the first outer lead and the second outer lead and a surface of the molded housing between the first outer lead and the third outer lead.
8. The semiconductor package of claim 4 , wherein the second and third outer leads have an inclination portion, wherein at least one of the inclination portions of the second and third outer leads includes a portion which is perpendicular to a surface of the molded housing and a flat portion which is larger than a thickness of the molded housing covering the inclination portions in a boundary between the inclination portions and the molded housing.
9. A semiconductor package in which a leadframe pad to which a semiconductor die is attached and inner leads electrically connected to the leadframe pad are covered by a molded housing, and outer leads extending from the inner leads protrude from a side surface of the molded housing to the outside,
wherein the outer leads include a first and second lead, wherein at least one of the first and second outer leads is covered by an extended portion of the molded housing where the extended portion is adjacent to the side surface of the molded housing; and
wherein the second lead has a bent or inclination portion in a region adjacent to the side surface of the molded housing, the bent or inclination portion protruding to increase a space between the first outer lead and the bent or inclination portion in the molded housing; and
wherein the molded housing is entirely formed on the bent or inclination portion of the second lead, the molded housing formed on the bent or inclination portion having a inner wall on the contour of the bent or inclination portion, an outer wall spaced from the inner wall, and wherein the outer wall between the first and second leads follows the contours of the bent or inclination portion, and an end wall.
10. The semiconductor package of claim 9 wherein the second lead has an inclination portion in which a distance between the first outer lead and the inclination portion becomes larger as a distance between the inclination portion and the side surface of the molded housing becomes smaller.
11. The semiconductor package of claim 9 wherein a depression which is depressed toward a body of the molded housing is formed on the surface of the molded housing between the first outer lead and the second outer lead.
12. The semiconductor package of claim 11 wherein the second lead has a bent portion in a portion where it is adjacent to the side surface of the molded housing, the bent portion protruding to increase a space between the first outer lead and the bent portion in the molded housing.
13. The semiconductor package of claim 11 wherein the second lead includes an inclination portion in which a distance between the first outer lead and the inclination portion becomes larger as a distance between the inclination portion and the side surface of the molded housing becomes smaller.
14. The semiconductor package of claim 9 further including a third lead, wherein the third lead is disposed in a central portion of the molded housing and the first and second outer leads respectively are disposed to the right and left of the third lead.
15. The semiconductor package of claim 14 wherein at least one of the first and second leads has a bent portion in a region where the leads are adjacent to the side surface of the molded housing, the bent portion protruding to increase a space between the first outer lead and the bent portion in the molded housing.
16. The semiconductor package of claim 14 wherein at least one of first and second leads includes an inclination portion in which a distance between the third, central lead and the inclination portion becomes larger as a distance between the inclination portion and the side surface of the molded housing becomes smaller, and wherein the inclination portion is covered by the extended portion of the molded housing.
17. The semiconductor package of claim 16 wherein at least one of the inclination portions of the first and second outer leads includes a portion which is perpendicular to a surface of the molded housing and a flat portion which is larger than a thickness of the molded housing covering the inclination portions in a boundary between the inclination portions and the molded housing.
18. The semiconductor package of claim 14 wherein a depression which is depressed toward a body of the molded housing is formed on at least one of a surface of the molded housing between the first outer lead and the second outer lead and a surface of the molded housing between the first outer lead and the third outer lead.
19. The semiconductor package of claim 18 wherein at least one of the first and second outer leads has a bent portion in a region where it is adjacent to the side surface of the molded housing, the bent portion protruding to increase a space between the third outer lead and the bent portion in the molded housing.
20. The semiconductor package of claim 18 wherein at least one of the first and second leads includes an inclination portion in which a distance between the third outer lead and the inclination portion becomes larger as a distance between the inclination portion and the side surface of the molded housing becomes smaller.
21. The semiconductor package of claim 20 wherein at least one of the inclination portions of the first and second outer leads includes a region which is perpendicular to a surface of the molded housing and a flat portion which is larger than a thickness of the molded housing covering inclination portions in a boundary between the inclination portions and the molded housing.