Method of manufacturing a semiconductor device including a mosfet with nitride sidewalls

1. A method of manufacturing a semiconductor device comprising:

preparing a semiconductor substrate;

forming a gate first insulating layer on the semiconductor substrate;

forming a lower gate electrode layer and a cap gate layer on the gate insulating layer;

patterning the lower gate electrode layer and the cap gate layer to form a gate electrode structure;

forming an LDD region on the semiconductor substrate;

depositing an oxide layer on the gate electrode structure and the semiconductor substrate, wherein a thickness of the oxide layer is greater than a thickness of the gate insulating layer;

forming a nitride layer on the oxide layer; and

etching the oxide layer and the nitride layer to form a nitride sidewall spacer on the gate electrode structure through the oxide layer.

2. A method of manufacturing a semiconductor device according to claim 1 , wherein said depositing comprises a CVD.

3. A method of manufacturing a semiconductor device according to claim 1 , wherein said forming a gate insulating layer comprises an oxidation.

4. A method of manufacturing a semiconductor device according to claim 1 , wherein the lower gate electrode layer is formed of polysilicon.

5. A method of manufacturing a semiconductor device according to claim 1 , wherein said etching comprises an anisotropic etching.

6. A method of manufacturing a semiconductor device according to claim 1 , wherein said forming a nitride layer comprises an LP-CVD.

7. A method of manufacturing a semiconductor device according to claim 1 , further comprising:

forming a source/drain region on the semiconductor substrate using the gate electrode structure and the nitride sidewall spacer as a mask.

8. A method of manufacturing a semiconductor device according to claim 7 , further comprising:

forming an intermediate insulating layer on the gate electrode structure and the semiconductor substrate;

forming a contact hole through the intermediate insulating layer so as to expose the source/drain region; and

filling a conductive material into the contact hole to form a source/drain contact electrode.

9. A method of manufacturing a semiconductor device comprising:

preparing a semiconductor substrate;

oxidizing the semiconductor substrate to form a gate insulating layer on the semiconductor substrate;

forming a polysilicon layer and a metal layer on the gate insulating layer;

patterning the polysilicon layer and the metal layer to form a gate electrode structure;

forming an LDD region on the semiconductor substrate using the gate electrode structure as a mask;

depositing an oxide layer on the gate electrode structure and the semiconductor substrate, wherein a thickness of the oxide layer is greater than a thickness of the gate insulating layer;

forming a nitride layer on the oxide layer; and

etching the oxide layer and the nitride layer to form a nitride sidewall spacer on the gate electrode structure through the oxide layer.

10. A method of manufacturing a semiconductor device according to claim 9 , wherein said depositing comprises a CVD.

11. A method of manufacturing a semiconductor device according to claim 9 , wherein said etching comprises an anisotropic etching.

12. A method of manufacturing a semiconductor device according to claim 9 , wherein said forming a nitride layer comprises an LP-CVD.

13. A method of manufacturing a semiconductor device according to claim 9 , further comprising:

forming a source/drain region on the semiconductor substrate using the gate electrode structure and the nitride sidewall spacer as a mask.

14. A method of manufacturing a semiconductor device according to claim 13 , further comprising:

forming an intermediate insulating layer on the gate electrode structure and the semiconductor substrate;

forming a contact hole through the intermediate insulating layer so as to expose the source/drain region; and

filling a conductive material into the contact hole to form a source/drain region contact electrode.

15. A method of manufacturing a MOSFET comprising:

preparing a semiconductor substrate;

forming a gate insulating layer on the semiconductor substrate;

forming a lower gate electrode layer and a cap gate layer on the gate insulating layer;

removing a part of the lower gate electrode layer and the cap gate layer to form a gate electrode structure;

implanting ions into the semiconductor substrate using the gate electrode structure as a mask to form an LDD region on the semiconductor substrate;

depositing an oxide layer on the gate electrode structure and the semiconductor substrate by a CVD, wherein a thickness of the oxide layer is greater than a thickness of the gate insulating layer;

forming a nitride layer on the oxide layer; and

subjecting the oxide layer and the nitride layer to anisotropic etching to form a nitride sidewall spacer on the gate electrode structure through the oxide layer.

16. A method of manufacturing a MOSFET according to claim 15 , wherein said forming a gate insulating layer comprises oxidation.

17. A method of manufacturing a MOSFET according to claim 15 , wherein the lower gate electrode layer is formed of polysilicon.

18. A method of manufacturing a semiconductor device according to claim 15 , wherein said forming a nitride layer comprises an LP-CVD.

19. A method of manufacturing a MOSFET according to claim 15 , further comprising:

implanting ions into the semiconductor substrate using the gate electrode structure and the nitride sidewall spacer as a mask to form a source/drain region on the semiconductor substrate.

20. A method of manufacturing a semiconductor device according to claim 19 , further comprising:

forming an intermediate insulating layer on the gate electrode structure and the semiconductor substrate;

forming a contact hole through the intermediate insulating layer so as to expose the source/drain region; and

filling a conductive material into the contact hole to form a source/drain contact electrode.