IP Library Granted Patent US 6,933,156
Granted Patent B2
US 6,933,156 · App. 10/764,519 · Granted Aug 23, 2005

Semiconductor capacitor with diffusion prevention layer

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Quick Facts
Patent No.
US 6,933,156
App. No.
10/764,519
Granted
Aug 23, 2005
Kind
B2
Abstract

A capacitor which has a lower electrode having a structure in which the first conductive layer containing a first metal, a second conductive layer that is formed on the first conductive layer and made of the metal oxide of the second metal different from the first metal, and a third conductive layer that is formed on the second conductive layer and made of a third metal different from the first metal. These layers are formed sequentially. A dielectric layer is formed on the lower electrode, and an upper electrode is formed on the capacitor dielectric layer.

Claims (17)

1. A manufacturing method of a capacitor comprising the steps of:

forming a first conductive layer containing a first metal on an insulating layer;

forming a second conductive layer made of a metal oxide of a second metal except iridium or ruthenium, that is different from the first metal, on the first conductive layer;

forming a third conductive layer made of a third metal except iridium or ruthenium, that is different from the first metal, on the second conductive layer;

forming a dielectric layer on the third conductive layer;

forming a fourth conductive layer on the dielectric layer;

patterning the fourth conductive layer to form a capacitor upper electrode;

patterning the dielectric layer to form a capacitor dielectric layer; and

patterning the first conductive layer, the second conductive layer, and the third conductive layer to form a capacitor lower electrode.

2. A manufacturing method of a capacitor according to claim 1 , wherein an element of the first metal is iridium, the metal oxide of the second metal is a metal oxide of a platinum group, that is different from the iridium, and the third metal is a metal of the platinum group, that is different from the iridium.

3. A manufacturing method of a capacitor according to claim 1 , wherein the second metal is a same element as the third metal, and

further comprising the step of forming an interface conductive layer made of the second metal between the first conductive layer and the second conductive layer.

4. A manufacturing method of a capacitor according to claim 13, wherein formation of the first conductive layer contains the step of forming the first metal layer and a first metal oxide layer sequentially.

5. A manufacturing method of a capacitor according to claim 4 , wherein the first metal layer is an iridium layer, and the first metal oxide layer is iridium oxide, and

the iridium oxide is formed by adjusting an oxygen gas and an inert gas in a growth atmosphere to attain IrO x (0<x<1.2).

6. A manufacturing method of a capacitor according to claim 1 , wherein, in the step of forming the second conductive layer, the second conductive layer made of platinum oxide is formed at a temperature of more than 200° C. and less than 400° C.

7. A manufacturing method of a capacitor according to claim 1 , wherein, in the step of forming the third conductive layer, the third conductive layer made of platinum is formed at a temperature of less than 400° C.

Assignments (3)
CHANGE OF ADDRESS Recorded Dec 23, 2016
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 041188/0401 →
CHANGE OF NAME Recorded Aug 2, 2010
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 024804/0269 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 5, 2008
From: FUJITSU LIMITED
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 021976/0876 →