IP Library › Granted Patent US 6,869,337
Granted Patent B2
US 6,869,337 · App. 10/770,599 · Granted Mar 22, 2005

System and method for polishing and planarizing semiconductor wafers using reduced surface area polishing pads and variable partial pad-wafer overlapping techniques

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Quick Facts
Patent No.
US 6,869,337
App. No.
10/770,599
Granted
Mar 22, 2005
Kind
B2
Abstract

A system and method for polishing semiconductor wafers includes a variable partial pad-wafer overlap polisher having a reduced surface area, fixed-abrasive polishing pad and a polisher having a non-abrasive polishing pad for use with an abrasive slurry. The method includes first polishing a wafer with the variable partial pad-wafer overlap polisher and the fixed-abrasive polishing pad and then polishing the wafer in a dispersed-abrasive process until a desired wafer thickness is achieved.

Claims (19)

1. A method of planarizing and polishing semiconductor wafers comprising:

rotating a first polishing pad about a central axis, wherein the polishing pad has a polishing pad material comprising a fixed-abrasive material positioned along a circumference of the first polishing pad and extending radially inwardly a portion of a radius of the first polishing pad, and wherein the polishing pad material defines a central region lacking polishing pad material and symmetric about a diameter of the first polishing pad;

pressing a portion of the polishing pad material on the first polishing pad against a portion of a rotating semiconductor wafer, wherein the first polishing pad partially overlaps the semiconductor wafer;

maintaining a first pressure between the first polishing pad and the semiconductor wafer;

planarizing the semiconductor wafer with the first polishing pad until a first wafer film thickness is achieved;

disengaging the first polishing pad from the semiconductor wafer; and

applying a dispersed-abrasive polishing process to the semiconductor wafer until a final wafer film thickness is reached.

2. The method of claim 1 wherein maintaining a first pressure comprises maintaining a pressure of at least 15 pounds per square inch between the polishing pad and the semiconductor wafer.

3. The method of claim 1 wherein maintaining a first pressure comprises maintaining a pressure of at least 2 pounds per square inch between the polishing pad and the semiconductor wafer.

4. The method of claim 1 wherein applying a dispersed-abrasive process comprises:

pressing the semiconductor wafer against a second polishing pad;

applying a chemical slurry to the second polishing pad while the semiconductor wafer and the second polishing pad move against each other; and

maintaining a second pressure between the second polishing pad and the semiconductor wafer.

5. The method of claim 4 wherein the second polishing pad has a non-abrasive polishing pad material positioned along a circumference of the second polishing pad and extending radially inwardly a portion of a radius of the second polishing pad, wherein the polishing pad material defines a central region lacking polishing pad material and symmetric about a diameter of the second polishing pad.

6. The method of claim 4 wherein the second polishing pad comprises a non-abrasive polishing pad material.

7. The method of claim 6 wherein the polishing pad material comprises an annular surface.

8. The method of claim 4 wherein the second polishing pad comprises a linear belt constructed of non-abrasive polishing pad material.

9. The method of claim 4 wherein the second pressure is less than the first pressure.

10. The method of claim 1 wherein the polishing pad material comprises an annular surface.