Method for fabricating semiconductor integrated circuit device
View Patent ↗A method for fabricating a semiconductor integrated circuit device of the invention comprises feeding oxidation species containing a low concentration of water, which is generated from hydrogen and oxygen by the catalytic action, to the main surface of or in the vicinity of a semiconductor wafer, and forming a thin oxide film serving as a gate insulating film of an MOS transistor and having a thickness of 5 nm or below on the main surface of the semiconductor wafer at an oxide film-growing rate sufficient to ensure fidelity in formation of an oxide film and uniformity in thickness of the oxide film.
1. A method for fabricating a semiconductor integrated circuit device, comprising the steps of:
(a) introducing a wafer into a single wafer heat treatment chamber of an oxidation furnace;
(b) replacing gas ambient, in the heat treatment chamber where the wafer has been introduced, with nitrogen gas;
(c) preparing moisture at a first temperature from oxygen and hydrogen gases by use of a catalyst;
(d) transferring the thus-prepared moisture into the heat treatment chamber to form a wet oxidative atmosphere over a first major surface of the wafer inside the heat treatment chamber, while keeping the moisture in a gaseous state;
(e) performing thermal oxidation treatment of a silicon member over the first major surface of the wafer to form an insulating film in the wet oxidative atmosphere in the heat treatment chamber by heating the first major surface of the wafer up to a second temperature higher than the first temperature;
(f) after step (e), replacing the wet oxidative atmosphere, in the heat treatment chamber where the wafer has been introduced, with nitrogen gas.
2. A method for fabricating a semiconductor integrated circuit device according to claim 1 , wherein said insulating film is a gate insulating film of an insulated gate field effect transistor.
3. A method for fabricating a semiconductor integrated circuit device according to claim 2 , wherein gate length of said insulated gate field effect transistor is not more than 0.25 μm.
4. A method for fabricating a semiconductor integrated circuit device according to claim 1 , wherein the first temperature is not more than 500° C., and the second temperature is not less than 800° C.
5. A method for fabricating a semiconductor integrated circuit device according to claim 2 , wherein the first temperature is not more than 500° C., and the second temperature is not less than 800° C.
6. A method for fabricating a semiconductor integrated circuit device according to claim 3 , wherein the first temperature is not more than 500° C., and the second temperature is not less than 800°.