Method and apparatus providing cancellation of second order intermodulation distortion and enhancement of second order intercept point (IIP2) in common source and common emitter transconductance circuits

1. A transconductor circuit, comprising:

a first input device M 1 and a second input device M 2 each having a control terminal coupled to a differential radio frequency input signal; and

a bias setting device M B having a control terminal coupled to said differential radio frequency input signal and an output coupled to said control terminal of each of said M 1 and M 2 , where M B is partitioned into two equal sized paralleled bias setting devices M B1 and M B2 , where M B1 and M B2 are coupled to said control terminals of M 1 and M 2 for establishing a bias voltage at the control terminals of M 1 and M 2 and wherein said differential radio frequency input signal is coupled to a base of M B1 and a base of M B2 , respectively.

2. A transconductor circuit as in claim 1 , where M 1 , M 2 , M B1 and M B2 are CMOS field effect transistors (FETS) and where said control terminal of each is a gate, where M 1 and M 2 are connected in a common source configuration, where a drain of M B1 is coupled to said gate of M 1 through a first resistance and to said gate of M 2 through a second resistance, and where a drain of M B2 is coupled to said gate of M 1 through said first resistance and to said gate of M 2 through said second resistance.

3. A transconductor circuit as in claim 2 , where said gate of M B1 and said gate of M B2 are each capacitively coupled to said RF input signal.

4. A transconductor circuit as in claim 2 , where said drain of each of M B1 and M B2 is coupled to a source of bias current I B.

5. A transconductor circuit as in claim 1 , where M 1 , M 2 , M B1 and M B2 are bipolar transistors Q 1 , Q 2 , Q B1 and Q B2 and where said control terminal of each is a base, where Q 1 and Q 1 are connected in a common emitter configuration, where a collector of each of Q B1 and Q B2 is coupled to a source of bias current I B and to a base of a further bias transistor Q Bb having an emitter coupled to said base of Q 1 through a first resistance and to said base of Q 2 through a second resistance.

6. A transconductor circuit as in claim 5 , where said base of Q B1 is coupled to said first resistance and to said base of Q 1 , and where said base of Q B2 is coupled to said second resistance and to said base of Q 2.

7. A transconductor circuit as in claim 6 , where said bases of Q 1 , Q 2 , Q B1 and Q B2 are each capacitively coupled to said RE input signal.

8. A transconductor circuit as in claim 5 , where a collector of Q Bb is coupled to a supply voltage V DD.

9. A transconductor circuit as in claim 5 , where emitters of Q 1 , Q 2 , Q B1 and Q B2 are each degenerated using a degeneration impedance.

10. A transconductor circuit as in claim 5 , where a value of the degeneration impedance of each of Q B1 and Q B2 is about twice the value of a degeneration impedance that would be used if only a single degenerated bias transistor Q B were used in place of Q B1 and Q B2.

11. A transconductor circuit as in claim 1 , forming a part of a mixer of a cellular telephone.

12. A transconductor circuit as in claim 1 , disposed in a radio frequency integrated circuit.

13. A transconductor circuit as in claim 1 , disposed in a radio frequency integrated circuit of a direct conversion receiver of a cellular telephone.

14. A transconductor circuit as in claim 1 , disposed in a radio frequency integrated circuit as part of a down-conversion mixer of a direct conversion receiver of a cellular telephone.

15. A method to substantially cancel second-order intermodulation distortion and enhance a second order intercept point in a transconductance circuit, comprising:

constructing the circuit to comprise a first input device M 1 , a second input device M 2 and a bias setting device M B each having a control terminal coupled to a differential radio frequency input signal, where an output of M B is coupled to said control terminal of each of said M 1 and M 2 ; and

partitioning M B into two equal sized paralleled bias setting devices M B1 and M B2, where M B1 and M B2 are coupled to said control terminals of M 1 and M 2 for establishing a bias voltage at the control terminals of M 1 and M 2 and wherein said differential radio frequency input signal is coupled to a base of M B1 and a base of MB2, respectively.

16. A method as in claim 15 , further comprising coupling M 1 , M 2 and M B to a supply voltage, and operating the circuit with said supply voltage of about one volt.

17. A method as in claim 15 , where M 1 , M 2 , M B1 and M B2 are CMOS field effect transistors (FETS) and where said control terminal of each is a gate, where M 1 and M 2 are connected in a common source configuration, where a drain of M B1 is coupled to said gate of M 1 through a first resistance and to said gate of M 2 through a second resistance, and where a drain of M B2 is coupled to said gate of M 1 through said first resistance and to said gate of M 2 through said second resistance, where said drain of each of M B1 and M B2 is coupled to a source of bias current I B , and where said gate of M B1 and said gate of M B2 are each capacitively coupled to said differential RF input signal.

18. A method as in claim 15 , where M 1 , M 2 , M B1 and M B2 are bipolar transistors Q 1 , Q 2 , Q B1 and Q B2 and where said control terminal of each is a base, where Q 1 and Q 2 are connected in a common emitter configuration, where a collector of each of Q B1 and Q B2 is coupled to a source of bias current I B and to a base of a further bias transistor Q Bb having an emitter coupled to said base of Q 1 through a first resistance and to said base of Q 2 through a second resistance, where said base of Q B1 is coupled to said first resistance and to said base of Q 1 , and where said base of Q B2 is coupled to said second resistance and to said base of Q 2 , and where said bases of Q 1 , Q 2 , Q B1 and Q B2 are each capacitively coupled to said differential RF input signal.

19. A method as in claim 18 , further comprising coupling a collector of Q Bb to a supply voltage V DD.

20. A method as in claim 18 , where emitters of Q 1 , Q 2 , Q B1 and Q B2 are each degenerated using a degeneration impedance.

21. A method as in claim 20 , where a value of the degeneration impedance of each of Q B1 and Q B2 is about twice the value of a degeneration impedance that would be used if only a single degenerated bias transistor Q B were used in place of Q B1 and Q B2.

22. A method as in claim 15 , further comprising using said transconductance circuit as a part of a mixer of a cellular telephone.

23. A method as in claim 15 , further comprising using said transconductance circuit as a part of a radio frequency integrated circuit.

24. A method as in claim 15 , further comprising using said transconductance circuit as a part of a radio frequency integrated circuit of a direct conversion receiver of a cellular telephone.

25. A method as in claim 15 , further comprising using said transconductance circuit as a part of a radio frequency integrated circuit as part of a down-conversion mixer of a direct conversion receiver of a cellular telephone.

26. A method as in claim 1 , where said supply voltage V DD has a value of about one volt.

27. A method as in claim 19 , where said supply voltage V DD has a value of about 1.2 volts.

28. A mobile radio frequency communications unit comprising at least one radio frequency integrated circuit that contains at least one transconductance circuit that comprises a first input device M 1 , a second input device M 2 and a bias setting device M B each having a control terminal coupled to a differential input radio frequency signal, where an output of M B is coupled to said control terminal of each of said M 1 and M 2 , where M B is fabricated as two substantially equal sized paralleled bias setting devices M B1 and M B2 , where M B1 and M B2 are coupled to said control terminals of M 1 and M 2 for establishing a bias voltage at the control terminals of M 1 and M 2 and operate so as to substantially cancel second-order intermodulation distortion and enhance a second order intercept point of said transconductance circuit, and wherein said at least differential radio frequency signal is coupled to a base of MB 1 and a base of MB 2 , respectively.

29. A mobile radio frequency communications unit as in claim 28 , where M 1 , M 2 , M B1 and M B2 are each one of a MOS device or a bipolar device.

30. A mobile radio frequency communications unit as in claim 28 , where M 1 , M 2 , M B1 and M B2 are each degenerated.

31. A mobile radio frequency communications unit as in claim 28 , where a value of a degeneration impedance of each of M B1 and M B2 is about twice the value of a degeneration impedance that would be used if only the single degenerated bias device M B were used in place of M B1 and M B2.

32. A mobile radio frequency communications unit as in claim 28 , where said differential input radio frequency signal is comprised of v RF+ and v RF− , and where said control terminal of each of M 1 and M B1 is capacitively coupled to v RF+ , and where said control terminal of each of M 2 and M B2 is capacitively coupled to v RF−.

33. A mobile radio frequency communications unit as in claim 28 , where at least said transconductance circuit operates with a supply voltage V DD that has a value of about 1.2 volts or less.