Compensation circuit and compensation method to compensate nonlinear distortions of an A/D converter
View Patent ↗The invention relates to a compensation circuit ( 1–6 ) to compensate nonlinear distortions of an A/D converter comprising a signal input and a compensation system. In order to avoid the high costs related to the complex analog design of the A/D converter and/or the high energy consumption in this converter and compensation system, it is proposed that a compensation circuit be used that is composed of digital circuit elements that are connected following the A/D converter and which has a nonlinearly distorted output signal of the A/D converter supplied to it to compensate the nonlinear distortion. Adaptive coefficients are preferably employed here for the compensation.
1. A system for compensating for distortion within an analog-to-digital converter, the system comprising:
a test signal generator that provides an analog test signal and a digitized test signal indicative of the analog test signal;
an analog-to-digital converter that selectively receives an input signal and the analog test signal and provides a digitized signal;
a compensation circuit that receives the digitized signal and filter coefficients, and provides a compensated digitized signal;
a test signal check device that receives and processes the compensated digitized signal to extract a sequence of output data;
a difference unit that receives the sequence of output data and the compensated digitized signal and provides a difference signal indicative of the difference; and
a coefficient determination unit that receives the difference signal and the digitized signal and provides the filter coefficients.
2. The system of claim 1 , where the compensation circuit comprises a compensator unit that provides the compensated digitized signal y n based upon the expression
y
n
=
∑
k
k
=
0
c
k
(
m
)
·
x
n
k
.
3. The system of claim 2 , where the coefficients c k are computed as a function of the digitized signal.
4. The system of claim 1 , where the compensation circuit comprises a compensator unit that provides the compensated digitized signal y n based upon the expression
y
n
=
∑
k
k
=
0
c
k
(
m
)
·
x
n
k
where
m
=
⌊
N
·
x
n
+
1
2
⌋
.
5. The system of claim 1 , where the test signal check device comprises a CORDIC unit responsive to in-phase and quadrature components of the digitized signal y n to provide an amplitude signal to a DC component recovery circuit that provides the sequence of output data.
6. The system of claim 1 , further comprising a timing unit that selectively determines whether the input signal or the analog test signal is processed by the analog-to-digital converter.
7. The system of claim 1 , further comprising a timing unit that selectively determines whether the input signal or the analog test signal is processed by the analog-to-digital converter.
8. A system for compensating for distortion within an analog-to-digital converter, the system comprising:
means for providing an analog test signal;
an analog-to-digital converter that selectively receives an input signal and the analog test signal and provides a digitized signal;
compensation means for receiving the digitized signal and adaptive filter coefficients, and for providing a compensated digitized signal;
means for receiving and processing the compensated digitized signal to extract a sequence of output data;
a difference unit that receives the sequence of output data and the compensated digitized signal and provides a difference signal indicative of the difference; and
means responsive to the difference signal and the digitized signal for providing the filter coefficients.
9. The system of claim 8 , where the compensation circuit comprises a compensator unit that provides the compensated digitized signal y n based upon the expression
y
n
=
∑
k
k
=
0
c
k
(
m
)
·
x
n
k
.
10. The system of claim 9 , where the coefficients c k are computed as a function of the digitized signal.
11. The system of claim 8 , where the compensation circuit comprises a compensator unit that provides the compensated digitized signal y n based upon the expression
y
n
=
∑
k
k
=
0
c
k
(
m
)
·
x
n
k
where
m
=
⌊
N
·
x
n
+
1
2
⌋
.
12. The system of claim 8 , where the means for receiving and processing comprises a CORDIC unit responsive to in-phase and quadrature components of the digitized signal y n to provide an amplitude signal to a DC component recovery circuit that provides the sequence of output data.
13. The system of claim 8 , further comprising a timing unit that selectively determines whether the input signal or the analog test signal is processed by the analog-to-digital converter.
14. A system for compensating for distortion within an analog-to-digital converter, the system comprising:
a test signal generator that provides an analog test signal;
an analog-to-digital converter that selectively receives an input signal and the analog test signal and provides a digitized signal;
compensation means for receiving the digitized signal and filter coefficients, and for providing a compensated digitized signal;
means for receiving and processing the compensated digitized signal to extract a sequence of output data;
a difference unit that receives the sequence of output data and the compensated digitized signal and provides a difference signal indicative of the difference; and
means responsive to the difference signal and the digitized signal for providing the filter coefficients.
15. The system of claim 14 , where the compensation means comprises a compensator unit that provides the compensated digitized signal y n based upon the expression
y
n
=
∑
k
k
=
0
c
k
(
m
)
·
x
n
k
.
16. The system of claim 15 , where the coefficients c k are computed as a function of the digitized signal.
17. The system of claim 14 , where the compensation means comprises a compensator unit that provides the compensated digitized signal y n based upon the expression
y
n
=
∑
k
k
=
0
c
k
(
m
)
·
x
n
k
where
m
=
⌊
N
·
x
n
+
1
2
⌋
.
18. The system of claim 14 , where the menas for receiving and processing comprises a CORDIC unit responsive to in-phase and quadrature components of the digitized signal y n to provide an amplitude signal to a DC component recovery circuit that provides the sequence of output data.