IP Library Granted Patent US 7,061,127
Granted Patent B2
US 7,061,127 · App. 10/779,710 · Granted Jun 13, 2006

Semiconductor device, manufacturing method and mounting method of the semiconductor device, circuit board, and electronic apparatus

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Quick Facts
Patent No.
US 7,061,127
App. No.
10/779,710
Granted
Jun 13, 2006
Kind
B2
Abstract

To easily determine an orientation of a semiconductor device, a semiconductor device includes a substrate including electrode electrically connected to an integrated circuit, an external terminal electrically connected to the electrode, and a light transmissive insulation layer provided on the external terminal side of the substrate, and a mark provided on the substrate and covered by the insulation layer and recognizable through the insulation layer.

Claims (29)

1. A semiconductor device, comprising:

a substrate including an electrode electrically connected to at least one integrated circuit;

a resin layer formed on the side of the substrate where the electrode is formed, avoiding the location of the electrode;

an interconnection layer extending from the electrode to an upper surface of the resin layer and including at least one land formed on the resin layer;

an external terminal being provided on the land and electrically connected to the electrode;

a light transmissive insulation layer disposed on the external terminal side of the substrate, the insulation layer being formed to cover the interconnection layer with at least a part of the external terminal exposed; and

a mark provided on the substrate and covered by the light transmissive insulation layer so as to be visible through the insulation layer,

wherein the substrate is a semiconductor substrate, and the integrated circuit is formed on the semiconductor substrate.

2. The semiconductor device according to claim 1 , the mark being provided on the resin layer.

3. The semiconductor device according to claim 1 , further comprising:

a passivation film provided on the semiconductor substrate,

the mark being provided on the passivation film.

4. The semiconductor device according to claim 1 , the mark being made of the same material as at least a part of the material which the interconnection layer is made of.

5. The semiconductor device according to claim 1 , the mark being provided on an area not in contact with the interconnection layer.

6. The semiconductor device according to claim 1 , the interconnection layer having a plurality of lands including a first land having a shape incorporating the mark and a second land having a shape different from the shape of the first land.

7. The semiconductor device according to claim 1 , the external terminal being a solder ball, and the insulation layer being a solder resist.

8. The semiconductor device according to claim 1 , the semiconductor substrate being a semiconductor wafer including the integrated circuit for each of plural areas.

9. The semiconductor device according to claim 1 , the semiconductor substrate being a semiconductor chip.

10. The semiconductor device according to claim 9 , the mark being provided on at least one of the four corners of the semiconductor chip.

11. A circuit board, comprising a semiconductor device, the semiconductor device, comprising:

a substrate including an electrode electrically connected to at least one integrated circuit;

a resin layer formed on the side of the substrate where the electrode is formed, avoiding the location of the electrode;

an interconnection layer extending from the electrode to an upper surface of the resin layer and including at least one land formed on the resin layer;

an external terminal being provided on the land and electrically connected to the electrode;

a light transmissive insulation layer disposed on the external terminal side of the substrate, the insulation layer being formed to cover the interconnection layer with at least a part of the external terminal exposed; and

a mark provided on the substrate and covered by the light transmissive insulation layer so as to be visible through the insulation layer.

12. An electronic apparatus, comprising a circuit board according to claim 11 .

13. A method of mounting a semiconductor device, comprising a substrate including an electrode electrically connected to at least one integrated circuit; a resin layer formed on the side of the substrate where the electrode is formed, avoiding the location of the electrode; an interconnection layer extending from the electrode to an upper surface of the resin layer and including at least one land formed on the resin layer; an external terminal being provided on the land and electrically connected to the electrode; a light transmissive insulation layer disposed on the external terminal side of the substrate, the insulation layer being formed to cover the interconnection layer with at least a part of the external terminal exposed; and a mark provided on the substrate and covered by the light transmissive insulation layer so as to be visible through the insulation layer, onto a circuit board, the method comprising:

determining a mounting orientation of the semiconductor device by recognizing the mark through the insulation layer.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 4, 2019
From: SEIKO EPSON CORPORATION
To: 138 EAST LCD ADVANCEMENTS LIMITED
Reel/Frame 050265/0622 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 28, 2004
From: HASHIMOTO, NOBUAKI
To: SEIKO EPSON CORPORATION
Reel/Frame 014676/0921 →