IP Library Granted Patent US 7,288,801
Granted Patent B2
US 7,288,801 · App. 10/786,878 · Granted Oct 30, 2007

Image sensing structure

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Quick Facts
Patent No.
US 7,288,801
App. No.
10/786,878
Granted
Oct 30, 2007
Kind
B2
Abstract

A CMOS image sensing structure includes a photodiode, in which an epitaxial layer is on a P-type substrate. The photodiode includes an N-well collection node in the epitaxial layer. An isolation trench is provided around the collection node to provide better control of the width of the collection node. The collection node can be surrounded by P-wells or by epitaxial material. It can also be surrounded by epitaxial material with the isolation trench being outwardly extended to ensure compliance with existing design rules.

Claims (32)

1. An image sensing structure comprising:

at least one photodiode comprising

a layer comprising a first conductivity type epitaxial layer and having an upper surface,

a well of a second conductivity type having opposing sides and positioned in said layer comprising the first conductivity type epitaxial layer, said well defining a collection node, and

an isolation trench at least partially bounding an upper portion of said well at the opposing sides thereof and comprising a shallow trench isolation (STI) having a depth from the upper surface of said layer comprising the first conductivity type epitaxial layer less than the depth of said well.

2. An image sensing structure according to claim 1 , wherein said STI completely bounds the upper portion of said well.

3. An image Sensing structure according to claim 1 , wherein said well comprises an N-well.

4. An image sensing structure according to claim 1 , wherein said layer comprising the first conductivity type epitaxial layer comprises a P-well.

5. An image sensing structure according to claim 1 , wherein an upper surface of said at least one photodiode is substantially defined by said STI.

6. An image sensing structure according to claim 1 , wherein a width of said at least one photodiode is less than or equal to 10 micrometers.

7. A CMOS image sensing structure comprising:

a semiconductor substrate; and

at least one photodiode in said semiconductor substrate and comprising

a layer comprising a P-type conductivity epitaxial layer and having an upper surface,

a well of an N-type conductivity having opposing sides and positioned in said layer comprising the P-type conductivity epitaxial layer, said well defining a collection node, and

an isolation trench at least partially bounding an upper portion of said well at the opposing sides thereof and comprising a shallow trench isolation (STI) having a depth from the upper surface of said layer Comprising the P-type conductivity epitaxial layer less than the depth of said well.

8. An image sensing structure according to claim 7 , wherein said STI completely bounds the upper portion of said well.

9. An image sensing structure according to claim 7 , wherein an upper surface of said at least one photodiode is substantially defined by said STI.

10. An image sensing structure according to claim 7 , wherein an n-p junction is formed at an interface between said STI and said well.

11. An image sensing structure according to claim 7 , wherein a width of said at least one photodiode is less than or equal to 10 micrometers.

12. An image sensing structure according to claim 1 wherein the depth of the STI is about 2 μm and the depth of the well is about 3 μu.

13. An image sensing structure comprising:

at least one photodiode defining a pixel having a width, said at least one photodiode and comprising

a layer having a first conductivity type and having an upper surface,

a well of a second conductivity type having opposing sides and positioned in said layer, said well defining a collection node, and

an isolation trench at least partially bounding an upper portion of said well at the opposing sides thereof and comprising a shallow trench isolation (STI) having a depth from the upper surface of said layer less than the depth of said well and having a width substantially extending over the width of the pixel,

an n-p junction being formed at an interface between said STI and said well.

14. An image sensing structure according to claim 13 , wherein said layer comprises a first conductivity type epitaxial layer.

15. An image sensing structure according to claim 13 , wherein said STI completely bounds the upper portion of said well.

16. An image sensing structure according to claim 13 , wherein said well comprises an N-well.

17. An image sensing structure according to claim 13 , wherein said layer comprises a P-well.

18. An image sensing structure according to claim 13 , wherein an upper surface of said at least one photodiode is substantially defined by said STI.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 31, 2016
From: STMICROELECTRONICS LIMITED
To: STMICROELECTRONICS (RESEARCH & DEVELOPMENT) LIMITED
Reel/Frame 038847/0890 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 24, 2004
From: RAYNOR, JEFFREY
To: STMICROELECTRONICS LTD.
Reel/Frame 015506/0661 →