Method and apparatus for providing generalized write pre-compensation

1. A circuit for providing generalized write pre-compensation, comprising:

a coarse phase generator for generating N coarse phase signals;

a fine phase generator, coupled to the coarse phase generator, for using the N coarse phase signals to generate M fine phase signals; and

a write pre-compensation circuit, coupled to the fine phase generator, for choosing a fine phase signal from the M fine phase signals to provide a shift to received write data to achieve a first desired pre-compensation.

2. The circuit of claim 1 , wherein the fine phase signal chosen provides a shift to received write data to achieve a first desired positive pre-compensation.

3. The circuit of claim 1 , wherein the fine phase signal chosen provides a shift to received write data to achieve a first desired negative pre-compensation.

4. The circuit of claim 1 , wherein the fine phase signal is chosen to further provide a shift to received write data to achieve positive or negative timing asymmetry correction.

5. The circuit of claim 1 , wherein the coarse phase generator comprises a X stage differential ring VCO running at a first frequency and providing 2X phase signals of 0° to 360° in 360°/(2X ) increments.

6. The circuit of claim 1 , wherein the coarse phase generator comprises a X stage differential ring VCO running at a second frequency, the coarse phase generator further comprises differential dividers and provides 4X phase signals of 0° to 360° in 360°/(8X ) increments.

7. The circuit of claim 1 , wherein the fine phase generator comprises an interpolator for providing voltage averaging to generate the M fine phase signals.

8. The circuit of claim 7 , wherein the fine phase generator further comprises drivers receiving one of the N coarse phase signals and serially coupled resistors disposed between the drivers for generating the M fine phase signals.

9. The circuit of claim 1 , wherein the write pre-compensation circuit further comprises:

a pre-compensation decoder, coupled to the fine phase generator, the pre-compensation decoder receiving a reference clock from the fine phase generator, the pre-compensation decoder receiving the write data;

a latch circuit, coupled to the fine phase generator and the pre-compensation decoder, the latch circuit being supplied the write data from the pre-compensation decoder and the M fine phase clock signals, the latch circuit supplying M latched write data signals shifted according to the M fine phase clock signals; and

a data selector, coupled to the latch circuit and the pre-compensation decoder, the data selector receiving a data selection signal from the pre-compensation decoder for indicating to the data selector which of the shifted M latched write data signals to provide as pre-compensated write data.

10. The circuit of claim 9 further comprises a write driver, the write driver receiving the pre-compensated write data and outputting NRZI write data.

11. The circuit of claim 10 , wherein a shifted M latched write data signal is chosen to further provide a shift to received write data to achieve timing asymmetry correction.

12. The circuit of claim 9 further comprising a divider for dividing the reference clock to increase a slew rate of the M fine phase clock signals and to provide a wider frequency range for the M fine phase clock signals, the coarse phase clock signals used is changed to provide the first desired pre-compensation.

13. A magnetic storage device, comprising:

a magnetic storage medium for recording data thereon;

a motor for moving the magnetic storage medium;

a head for reading and writing data on the magnetic storage medium;

an actuator for positioning the head relative to the magnetic storage medium; and

a data channel for processing encoded signals on the magnetic storage medium, the data channel comprising a coarse phase generator for generating N coarse phase signals, a fine phase generator, coupled to the coarse phase generator, for using the N coarse phase signals to generate M fine phase signals and a write pre-compensation circuit, coupled to the fine phase generator, for choosing a fine phase signal from the M fine phase signals to provide a shift to received write data to achieve a first desired pre-compensation.

14. The magnetic storage device of claim 13 , wherein the fine phase signal chosen provides a shift to received write data to achieve a first desired positive pre-compensation positive pre-compensation.

15. The magnetic storage device of claim 13 , wherein the fine phase signal chosen provides a shift to received write data to achieve a first desired negative pre-compensation positive pre-compensation.

16. The magnetic storage device of claim 13 , wherein the fine phase signal is chosen to further provide a shift to received write data to achieve timing asymmetry correction.

17. The magnetic storage device of claim 13 , wherein the coarse phase generator comprises a X stage differential ring VCO running at a first frequency and providing 2X phase signals of 0° to 360° in 360°/(2X ) increments.

18. The magnetic storage device of claim 13 , wherein the coarse phase generator comprises a X stage differential ring VCO running at a second frequency, the coarse phase generator further comprises differential dividers and provides 4X phase signals of 0° to 360° in 360°/(8X ) increments.

19. The magnetic storage device of claim 13 , wherein the fine phase generator comprises an interpolator for providing voltage averaging to generate the M fine phase signals.

20. The magnetic storage device of claim 19 , wherein the fine phase generator further comprises drivers receiving one of the N coarse phase signals and serially coupled resistors disposed between the drivers for generating the M fine phase signals.

21. The magnetic storage device of claim 13 , wherein the write pre-compensation circuit further comprises:

a pre-compensation decoder, coupled to the fine phase generator, the pre-compensation decoder receiving a reference clock from the fine phase generator, the pre-compensation decoder receiving the write data;

a latch circuit, coupled to the fine phase generator and the pre-compensation decoder, the latch circuit being supplied the write data from the pre-compensation decoder and the M fine phase clock signals, the latch circuit supplying M latched write data signals shifted according to the M fine phase clock signals; and

a data selector, coupled to the latch circuit and the pre-compensation decoder, the data selector receiving a data selection signal from the pre-compensation decoder for indicating to the data selector which of the shifted M latched write data signals to provide as pre-compensated write data.

22. The magnetic storage device of claim 21 further comprises a write driver, the write driver receiving the pre-compensated write data and outputting NRZI write data.

23. The magnetic storage device of claim 22 , wherein a shifted M latched write data signal is chosen to further provide a shift to received write data to achieve timing asymmetry correction.

24. The magnetic storage device of claim 21 further comprising a divider for dividing the reference clock to increase a slew rate of the M fine phase clock signals and to provide a wider frequency range for the M fine phase clock signals, the coarse phase clock signals used is changed to provide the first desired pre-compensation.

25. A method for providing generalized write pre-compensation, comprising:

generating N coarse phase signals;

using the N coarse phase signals to generate M fine phase signals; and

choosing a fine phase signal from the M fine phase signals to provide a shift to received write data to achieve a first desired pre-compensation.

26. The method of claim 25 , wherein the choosing a fine phase signal further comprises choosing a fine phase signal to achieve a first desired positive pre-compensation.

27. The method of claim 25 , wherein the choosing a fine phase signal further comprises choosing a fine phase signal to achieve a first desired negative pre-compensation.

28. The method of claim 25 , wherein the choosing a fine phase signal further comprises choosing a fine phase signal to further provide a shift to received write data to achieve positive or negative timing asymmetry correction.

29. The method of claim 25 , wherein the generating N coarse phase signals further comprises providing X phase signals of 0° to 360° in 360°/X increments.

30. The method of claim 25 , wherein the generating N coarse phase signals further comprises providing 2X phase signals of 0° to 360° in 360°/(2X ) increments.

31. The method of claim 25 , wherein the using the N coarse phase signals to generate M fine phase signals further comprises providing voltage averaging to the N coarse phase signals to generate the M fine phase signals.

32. The method of claim 25 , wherein the choosing a fine phase signal from the M fine phase signals to provide a shift to received write data to achieve a first desired pre-compensation further comprises:

shifting write data according to the M fine phase clock signals to produce M shifted write data signals; and

in response to receiving a reference clock and write data, supplying a data selection signal to choose one of the M shifted write data signals to provide as pre-compensated write data.

33. The method of claim 32 , wherein the supplying a data selection signal to choose one of the M shifted write data signals to further achieve timing asymmetry correction for the write data.

34. The method of claim 32 further comprising:

dividing the reference clock to increase a slew rate of the M fine phase clock signals and to provide a wider frequency range for the M fine phase clock signals; and

changing the coarse phase clock signals used to provide the first desired pre-compensation.