IP Library Granted Patent US 7,320,902
Granted Patent B2
US 7,320,902 · App. 10/788,447 · Granted Jan 22, 2008

Electronic device and method of manufacturing the same, chip carrier, circuit board, and electronic instrument

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Quick Facts
Patent No.
US 7,320,902
App. No.
10/788,447
Granted
Jan 22, 2008
Kind
B2
Abstract

An external terminal is formed on an interconnect pattern formed on a substrate by using a soldering material. Subsequently, a chip component having an electrode is mounted on the substrate. An interconnect for electrically connecting the electrode and the interconnect pattern is formed at a temperature lower than a melting point of the soldering material.

Claims (11)

1. A method of manufacturing an electronic device, the method comprising:

forming an external terminal on an interconnect pattern formed on a substrate;

subsequently mounting a chip component above the substrate face up with an adhesive disposed between the substrate and the chip component, the chip component having an electrode on a first surface of the chip component opposite to a second surface facing the substrate;

forming an insulating section adjacent to the chip component by applying a force between the substrate and the chip component so that a portion of the adhesive is pressed out to a region adjacent to the chip component, the portion having a top higher from the substrate than the first surface, the insulating section formed of the portion of the adhesive; and

forming by inkjet an interconnect on the insulating section from the electrode to the interconnect pattern for electrically connecting the electrode and the interconnect pattern at a temperature lower than a melting point of the external terminal.

2. The method of manufacturing an electronic device as defined by claim 1 ,

wherein the interconnect is formed of a dispersant including electrically conductive particles.

3. The method of manufacturing an electronic device as defined by claim 2 ,

wherein the step of forming the interconnect includes ejecting a dispersant including the electrically conductive particles over the insulating section and the interconnect pattern.

4. The method of manufacturing an electronic device as defined by claim 1 ,

wherein the chip component is a semiconductor element.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 4, 2019
From: SEIKO EPSON CORPORATION
To: 138 EAST LCD ADVANCEMENTS LIMITED
Reel/Frame 050265/0622 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 13, 2004
From: HASHIMOTO, NOBUAKI
To: SEIKO EPSON CORPORATION
Reel/Frame 014844/0543 →