Mass spectrometers on wafer-substrates
View Patent ↗An apparatus includes a semiconductor or dielectric wafer-substrate and first and second multi-layer structures located over the wafer-substrate. The first multi-layer structure includes an ionizer or an electronic ion detector. The second multi-layer structure includes an ion trap having entrance and exit ports. The ionizer or electronic ion detector has a port coupled to one of the ports of the ion trap.
1. An apparatus, comprising:
a semiconductor or dielectric wafer-substrate;
a first multi-layer structure being located over the wafer-substrate and including one of an ionizer and an electronic ion detector; and
a second multi-layer structure being located over the wafer-substrate and including an ion trap having entrance and exit ports; and
wherein the one of an ionizer and an electronic ion detector has a port coupled to one of the ports of the ion trap.
2. The apparatus of claim 1 , wherein the first multi-layer structure comprises an array of one of ionizers and electronic ion detectors, the second multi-layer structure comprises an array of ion traps, and the one of ionizers and electronic ion traps have ports coupled to ports of the ion traps.
3. The apparatus of claim 2 , further comprising
a third multi-layer structure located over the wafer-substrate and including a plurality of the other of ionizers and electronic ion detectors; and
wherein each ion detector and ionizer has a port coupled to a port of one of the ion traps.
4. The apparatus of claim 2 , wherein the first multilayer structure comprises:
first and second conducting layers; and
a dielectric layer interposed between the conducting layers; and
wherein a plurality of holes pass through the first multilayer structure, each hole coupling to an entrance port of one of the ion traps.
5. The apparatus of claim 2 , wherein the second multilayer structure further comprises:
a stack including top, middle, and bottom conducting layers, the bottom conducting layer being closer to the wafer-substrate than the other conducting layers, the top conducting layer being further from the wafer-substrate than the other conducting layers; and
wherein the middle conducting layer has an array of cylindrical cavities, each cavity having a port through the top conducting layer and a port through the bottom conducting layer.
6. The apparatus of claim 5 , wherein the first multilayer structure comprises:
first and second conducting layers; and
a dielectric layer interposed between the conducting layers of the first multi- layer structure; and
wherein a plurality of holes pass through the first multilayer structure, each hole coupling to an entrance port of one of the ion traps.
7. The apparatus of claim 3 , wherein each ion detector comprises a capacitor having one capacitor plate exposed to an exit port of one of the ion traps.
8. The apparatus of claim 2 , wherein the one of ionizers and electronic ion detectors are field ionizers.
9. The apparatus of claim 8 , further comprising a processor connected to receive signals indicative of numbers of ions received in said electronic ion detectors and to determine a mass-to-charge ratio of a portion of said ions based on said signals.
10. The apparatus of claim 8 , further comprising a device configured to convert a liquid sample into a jet of molecules directed toward a surface of the one of the multi-layer structures including the plurality of ionizers.
11. An apparatus, comprising:
a first semiconductor or dielectric wafer-substrate comprising a first multi-layer structure thereon, the first multi-layer structure having one of an ionizer and an electronic ion detector therein; and
a second semiconductor or dielectric wafer-substrate comprising a second multi-layer structure located thereon, the second multi-layer structure having an ion trap with entrance and exit ports; and
wherein the one of an ionizer and an electronic ion detector has a port coupled to one of the ports of the ion trap.
12. The apparatus of claim 11 , wherein the first and second wafer-substrates are bonded together along faces thereof.
13. The apparatus of claim 11 , wherein the first multi-layer structure comprises an array of one of ionizers and ion detectors, the second multi-layer structure comprises an array of ion traps, and the one of ionizers and ion detectors have ports coupled to ports of the ion traps.
14. The apparatus of claim 13 , further comprising
a third multi-layer structure located over a wafer-substrate and comprising an array of the other of ionizers and electronic ion detectors; and
wherein each ion detector and ionizer has a port coupled to a port of one of the ion traps.
15. The apparatus of claim 13 , wherein the first multilayer structure comprises:
first and second conducting layers; and
a dielectric layer interposed between the conducting layers; and
wherein a plurality of holes pass through the first multilayer structure, each hole coupling to an entrance port of one of the ion traps.
16. The apparatus of claim 13 , wherein the second multilayer structure further comprises:
a stack including top, middle, and bottom conducting layers, the bottom conducting layer being closer to the second wafer-substrate than the other conducting layers, the top conducting layer being further from the second wafer-substrate than the other conducting layers; and
wherein the middle conducting layer has an array of cylindrical cavities, each cavity having a port through the top conducting layer and a port through the bottom conducting layer.
17. The apparatus of claim 14 , further comprising a processor connected to receive signals indicative of numbers of ions received in said ion detectors and to determine a mass-to-charge ratio of a portion of said ions based on said signals.
18. The apparatus of claim 14 , further comprising a device configured to convert a liquid sample into a jet of molecules directed toward a surface of the one of the multi-layer structures including the array of ionizers.
19. A method, comprising:
fabricating a first multi-layer structure for an array of ionizers or electronic ion detectors on a wafer-substrate;
depositing a layer of sacrificial material on the first multi-layer structure;
planarizing the layer of sacrificial material;
fabricating a second multi-layer structure comprising an array of ion traps over the planarized layer of sacrificial material; and
then, removing the sacrificial material.
20. The method 19 further comprising:
fabricating a third multi-layer structure on the second multi-layered structure, the third multi-layered structure having an array of the other of ionizers or electronic ion detectors therein.
21. The method of claim 20 , wherein
the act of removing causes sacrificial material to be removed from trapping cavities of the ion traps.
22. A method, comprising:
fabricating a multi-layer structure for an array of ionizers or electronic ion detectors on a first wafer-substrate;
fabricating a multi-layer structure comprising an array of ion traps on a second wafer-substrate; and
then, putting the wafer-substrates together such that ports of the ion traps are coupled to ports of the ionizers or electronic ion detectors.
23. The method 22 further comprising:
fabricating a third multi-layer structure having an array of the other of ionizers or electronic ion detectors therein; and
wherein the third multi-layer structure is located such that ports of the other of ionizers or electronic ion detectors are coupled to ports of the ion traps.
24. The method of claim 23 , further comprising:
etching deep vias in backsides of the second wafer-substrate such that the vias couple to ports of the ion traps.