IP Library Granted Patent US 6,909,742
Granted Patent B1
US 6,909,742 · App. 10/789,622 · Granted Jun 21, 2005

Method and apparatus for reducing interference in a data stream using autocorrelation derived equalization

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Quick Facts
Patent No.
US 6,909,742
App. No.
10/789,622
Granted
Jun 21, 2005
Kind
B1
Abstract

Compensating for channel response in communications systems. An equalizing system includes a correlation block to calculate a correlation statistic from a received signal. The correlation statistic is used by a microcontroller to predict a channel response that includes a number of expansion coefficients. A steepest decent procedure is applied to the expansion coefficients. The steepest decent procedure may include, for example, a bias, or zeroing expansion coefficients by trial and error to remove ghost peaks. The steepest decent procedure produces a number of optimized expansion coefficients. The optimized expansion coefficients are used to create a number of filter coefficients. The filter coefficients are applied to an equalizer. The equalizer compensates for effects of the channel response to produce an equalized output signal.

Claims (53)

1. A method for reducing the effects of a channel response in an output signal received from across the channel, the method comprising:

measuring the output signal for a period of time;

calculating a correlation statistic from the measured output signal;

estimating a channel response including a plurality of expansion coefficients by applying a steepest decent procedure to the correlation statistic, wherein the steepest decent procedure includes a bias and optimizes the plurality of expansion coefficients;

determining an estimated channel response from the optimized expansion coefficients;

generating filter coefficients for an equalizing filter from the optimized expansion coefficients; and

passing the output signal through the equalizing filter, to reduce the effects of the channel response whereby an equalized output signal is produced.

2. The method of claim 1 , wherein applying a steepest decent procedure comprises applying a steepest decent procedure with a plurality of different bias values until a bias value is used that provides a suitable bit error rate.

3. The method of claim 1 , wherein the bias is selected from a range of values.

4. The method of claim 1 further comprising:

monitoring the output of an error detection block of the equalizing filter; and

recursively adjusting the filter coefficients in response to the output of the error detection block.

5. The method of claim 1 , further comprising trimming ghost peaks from the equalized output signal including zeroing one or more expansion coefficients in the steepest decent procedure.

6. The method of claim 1 , further comprising extracting a clock signal from the equalized output signal.

7. The method of claim 1 , further comprising converting the equalized output signal to an electrical signal.

8. A method for reducing the effects of a channel response in an output signal received from across the channel, the method comprising:

measuring the output signal for a period of time;

calculating a correlation statistic from the measured output signal;

estimating a channel response including a plurality of expansion coefficients by applying a steepest decent procedure to the correlation statistic, the steepest decent procedure zeros out expansion coefficients by trial and error to trim ghost peaks and optimizes the expansion coefficients;

determining an estimated channel response from the optimized expansion coefficients;

generating filter coefficients for an equalizing filter from the optimized expansion coefficients; and

passing the output signal through the equalizing filter, to reduce the effects of the channel response whereby an equalized output signal is produced.

9. The method of claim 8 further comprising:

monitoring the output of an error detection block of the equalizing filter; and

recursively adjusting the filter coefficients in response to the output of the error detection block of the equalizing filter.

10. The method of claim 8 , further comprising extracting a clock signal from the equalized output signal.

11. A system for reducing the response of a channel on signals passing through the channel, the system comprising:

a correlation block configured to compute a correlation statistic for a signal received from the channel;

a microcontroller coupled to the correlation block, the microcontroller configured to:

predict a channel response of the channel from the correlation statistic, the channel response including a plurality of expansion coefficients;

apply a steepest decent procedure to the correlation statistic that includes a bias, wherein the steepest decent procedure optimizes the plurality of expansion coefficients; and

generate a plurality of filter coefficients from the optimized expansion coefficients; and

an equalizer coupled to the microcontroller for receiving filter coefficients from the microcontroller, the equalizer adapted to compensate for effects of the channel response included in the signal to produce an equalized output signal.

12. The system of claim 11 , wherein the microprocessor is further configured to:

track time varying aspects of the channel response; and

adaptively update the expansion coefficients in response to the time varying aspects of the channel response.

13. The system of claim 11 , further comprising an error detection block coupled to the equalizer and wherein the microprocessor is further configured to:

monitor a signal from the error detection block; and

recursively adjust the expansion coefficients in response to signal from the error detection block.

14. The system of claim 11 , wherein the microprocessor is further configured to trim ghost peaks from the equalized output signal by zeroing expansion coefficients by trial and error.

15. A system for reducing the response of a channel on signals passing through the channel, the system comprising:

a correlation block configured to compute a correlation statistic for a signal received from the channel;

a microcontroller coupled to the correlation block, the microcontroller configured to:

predict a channel response of the channel from the correlation statistic, the channel response including a plurality of expansion coefficients;

apply a steepest decent procedure to the correlation statistic that includes zeroing expansion coefficients by trial and error, wherein the steepest decent procedure optimizes the expansion coefficients; and

generate a plurality of filter coefficients from the optimized expansion coefficients; and

an equalizer coupled to the microcontroller for receiving filter coefficients from the microcontroller, the equalizer adapted to compensate for effects of the channel response to produce an equalized output signal.

16. The system of claim 15 , wherein the microprocessor is further configured to:

track time varying aspects of the channel response; and

adaptively update the expansion coefficients in response to the time varying aspects of the channel response.

17. The system of claim 11 , further comprising an error detection block, wherein the microprocessor is further configured to:

monitor a signal from the error detection block; and

recursively adjust the expansion coefficients in response to the signal from the error detection block.

Assignments (5)
PATENT RELEASE AND REASSIGNMENT Recorded Jul 5, 2022
From: BANK OF AMERICA, N.A., AS ADMINISTRATIVE AGENT
To: II-VI INCORPORATED; MARLOW INDUSTRIES, INC.; EPIWORKS, INC.; LIGHTSMYTH TECHNOLOGIES, INC.; KAILIGHT PHOTONICS, INC.; COADNA PHOTONICS, INC.; OPTIUM CORPORATION; FINISAR CORPORATION; II-VI OPTICAL SYSTEMS, INC.; M CUBED TECHNOLOGIES, INC.; II-VI PHOTONICS (US), INC.; II-VI DELAWARE, INC.; II-VI OPTOELECTRONIC DEVICES, INC.; PHOTOP TECHNOLOGIES, INC.
Reel/Frame 060574/0001 →
SECURITY INTEREST Recorded Jul 1, 2022
From: II-VI INCORPORATED; II-VI DELAWARE, INC.; M CUBED TECHNOLOGIES, INC.; II-VI PHOTONICS (US), INC.; PHOTOP TECHNOLOGIES, INC.; COHERENT, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 060562/0254 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 1, 2020
From: FINISAR CORPORATION
To: II-VI DELAWARE, INC.
Reel/Frame 052286/0001 →
NOTICE OF GRANT OF SECURITY INTEREST IN PATENTS Recorded Sep 25, 2019
From: II-VI INCORPORATED; MARLOW INDUSTRIES, INC.; EPIWORKS, INC.; LIGHTSMYTH TECHNOLOGIES, INC.; KAILIGHT PHOTONICS, INC.; COADNA PHOTONICS, INC.; OPTIUM CORPORATION; FINISAR CORPORATION; II-VI OPTICAL SYSTEMS, INC.; M CUBED TECHNOLOGIES, INC.; II-VI PHOTONICS (US), INC.; II-VI DELAWARE, INC.; II-VI OPTOELECTRONIC DEVICES, INC.; PHOTOP TECHNOLOGIES, INC.
To: BANK OF AMERICA, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 050484/0204 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 27, 2004
From: LENOSKY, THOMAS J.
To: FINISAR CORPORATION
Reel/Frame 015034/0218 →