IP Library Granted Patent US 7,301,515
Granted Patent B2
US 7,301,515 · App. 10/797,871 · Granted Nov 27, 2007

Detectable flat panel display and recognition system therefor

Assignee: Au Optronics Corp.
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Quick Facts
Patent No.
US 7,301,515
App. No.
10/797,871
Granted
Nov 27, 2007
Kind
B2
Abstract

A detectable flat panel display and a recognition system therefor. The detectable flat panel display includes a substrate including a circuit region and a display region, a circuit device disposed on the circuit region of the substrate, a display device disposed in the display region of the substrate, and a metal pattern. The metal pattern can be formed in the circuit or display region and can reflect light such that the reflected light is detectable by recognition equipment.

Claims (44)

1. A detectable flat panel display, comprising:

a substrate;

a circuit device, disposed on the substrate;

a planarizing insulating layer, at least covering the circuit device;

a transparent light-emitting element, disposed on the planarizing insulating layer; and

a metal pattern, disposed in the planarizing insulating layer, capable of reflecting light through the transparent light-emitting element such that the reflected light is detectable by recognition equipment; and

a transparent insulating cover layer, disposed within and surrounded by the transparent light-emitting element, wherein a projection of the transparent insulating cover layer overlaps the metal pattern.

2. The detectable flat panel display as claimed in claim 1 , wherein the projection of the transparent insulating cover layer is only dimensioned to cover the metal pattern for avoiding the reflected light from the metal pattern being interfered by an emitting light from the transparent light-emitting element.

3. The detectable flat panel display as claimed in claim 1 , wherein the metal pattern in the planarizing insulating layer is between the circuit device and the transparent light-emitting element.

4. The detectable flat panel display as claimed in claim 1 , wherein the transparent light-emitting element comprises:

a transparent anode disposed on the planarizing insulating layer;

an organic light-emitting layer disposed on the transparent anode; and

a transparent cathode disposed on the organic light-emitting layer;

wherein the transparent insulating cover layer within the transparent light-emitting element is entirely sandwiched between the transparent anode and the organic light-emitting layer.

5. The detectable flat panel display as claimed in claim 4 , wherein the planarizing insulating layer comprising a contact window to expose the metal pattern.

6. The detectable flat panel display as claimed in claim 5 , wherein the transparent anode is continuously and conformally extended into the contact window for electrically connecting the metal pattern.

7. The detectable flat panel display as claimed in claim 6 , further comprising an opening within the contact window, filled with the transparent insulating cover layer.

8. The detectable flat panel display as claimed in claim 1 , wherein the circuit device is a thin film transistor.

9. The detectable flat panel display as claimed in claim 1 , wherein the transparent light-emitting element is an organic light-emitting diode.

10. A detectable flat panel display, comprising:

a substrate, comprising a thin film transistor (TFT) region and an organic light-emitting diode (OLED) region;

a thin film transistor disposed in the TFT region and an organic light-emitting diode disposed in the organic light-emitting diode (OLED) region, wherein the thin film transistor comprises a metal pattern, capable of reflecting light through the organic light-emitting diode such that the reflected light is detectable by recognition equipment;

a planarizing insulating layer, at least covering the thin film transistor, wherein the planarizing insulating layer comprises a contact window to expose the metal pattern; and

a transparent insulating cover layer, disposed within and surrounded by the organic light-emitting diode, wherein a projection of the transparent insulating cover layer overlaps the contact window and the underlying metal pattern.

11. The detectable flat panel display as claimed in claim 10 , wherein the organic light-emitting diode comprises:

a transparent anode in the OLED region, continuously and conformally extended into the contact window for electrically connecting the metal pattern;

an organic light-emitting layer, disposed on the transparent anode; and

a transparent cathode, disposed on the organic light-emitting layer;

wherein the transparent insulating cover layer within organic light-emitting diode is entirely sandwiched between the transparent anode and the organic light-emitting layer.

12. The detectable flat panel display as claimed in claim 10 , wherein the projection of the transparent insulating cover layer is only dimensioned to cover the contact window and the underlying metal pattern for avoiding the reflected light from the metal pattern being interfered by an emitting light from the organic light-emitting diode.

13. The detectable flat panel display as claimed in claim 12 , further comprising an opening within the contact window, filled with the transparent insulating cover layer.

14. The detectable flat panel display as claimed in claim 13 , wherein the metal pattern is a portion of a source electrode, a drain electrode, or a gate electrode of the thin film transistor.

15. The detectable flat panel display as claimed in claim 10 , wherein the planarizing insulating layer is a photoresist material or a dielectric material.

16. The detectable flat panel display as claimed in claim 15 , wherein the planarizing insulating layer is formed by spin coating.

17. A recognition system, comprising:

a detectable flat panel display; and

recognition equipment,

wherein the detectable flat panel display comprises:

a substrate, comprising a thin film transistor (TFT) region and an organic light-emitting diode (OLED) region;

a thin film transistor disposed in the TFT region and an organic light-emitting diode disposed in the organic light-emitting diode (OLED) region,

a planarizing insulating layer, at least covering the thin film transistor;

a metal pattern, disposed in the planarizing insulating layer, capable of reflecting light through the organic light-emitting diode such that the reflected light is detectable by the recognition equipment; and

a transparent insulating cover layer, disposed within and surrounded by the organic light-emitting diode, wherein a projection of the transparent insulating cover layer is only dimensioned to cover the metal pattern for avoiding the reflected light from the metal pattern being interfered by an emitting light from the organic light-emitting diode.

18. The recognition system as claimed in claim 17 , wherein the recognition equipment comprises a light source, a receiver, and a signal feedback device, wherein when light from the light source irradiates the detectable flat panel display, the light is reflected by the metal pattern, the receiver receives a signal of the reflected light and transmits the signal to the signal feedback device, and the signal feedback device transmits the signal back to the detectable flat panel display.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 24, 2025
From: AUO CORPORATION
To: NEOLAYER LLC
Reel/Frame 072266/0941 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 10, 2004
From: HUANG, WEI-PANG
To: AU OPTRONICS CORP.
Reel/Frame 015109/0119 →
Priority Claims (1)
TW 92112532 A · May 8, 2003 · national
Continuity (1)
Related Publication 20040222952A1 · Nov 11, 2004