IP Library Granted Patent US 7,057,399
Granted Patent B2
US 7,057,399 · App. 10/800,534 · Granted Jun 6, 2006

Resolver circuit including BTL amplifier

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Quick Facts
Patent No.
US 7,057,399
App. No.
10/800,534
Granted
Jun 6, 2006
Kind
B2
Abstract

A resolver circuit including a signal generation circuit, a bridge tied load amplifier, a resolver, and a resolver processing circuit is provided. The signal generation circuit is configured to generate an excitation signal for driving the resolver. The bridge tied load amplifier, having an input in electrical communication with the signal generation circuit, is configured to amplify the excitation signal. The resolver has an excitation winding and an output winding, with the excitation winding being in electrical communication with the bridge tied load amplifier. The resolver processing circuit is electrical communication with the output winding of the resolver to determine the angle of rotor of the resolver.

Claims (24)

1. A resolver circuit comprising:

a signal generation circuit configured to generate an excitation signal;

a bridge tied load amplifier, having an input in electrical communication with the signal generation circuit;

a resolver having an excitation winding in electrical communication with the bridge tied load amplifier;

a resolver processing circuit in electrical communication with a first output winding of the resolver.

2. The resolver circuit according to claim 1 , wherein the bridge tied load amplifier has a positive output and a negative output, the positive output being connected to one side of the excitation winding, the negative side being connected to the opposite side of the excitation winding.

3. The resolver circuit according to claim 1 , wherein the signal generation circuit is configured to generate a sinewave excitation signal.

4. The resolver circuit according to claim 1 , wherein the signal generation circuit is configured to generate an excitation signal of about 10 kHz.

5. The resolver circuit according to claim 1 , further comprising a low pass filter connected between the signal generation circuit and the bridge tied load amplifier.

6. The resolver circuit according to claim 5 , wherein the low pass filter includes a resistive load in electrical series with the bridge tied load amplifier and a capacitive load electrically parallel with the bridge tied load amplifier.

7. The resolver circuit according to claim 1 , wherein the resolver includes a second output winding in electrical communication with the resolver processing circuit.

8. The resolver circuit according to claim 1 , wherein the signal generation circuit and the resolver processing circuit form portions of a single integrated circuit device.

9. The resolver circuit according to claim 1 , wherein the bridge tied load amplifier includes a first linear amplifier and a second linear amplifier.

10. The resolver circuit according to claim 1 , wherein the bridge tied load amplifier includes a first and second amplifier, the second amplifier having an inverted output with respect to the first amplifier.

11. A resolver circuit comprising:

a signal generation circuit configured to generate an excitation signal;

a bridge tied load amplifier having an input in electrical communication with the signal generation circuit:

a resolver having an excitation winding in electrical communication with the bridge tied load amplifier; and

a resolver processing circuit in electrical communication with a first output winding of the resolver, wherein the bridge tied load amplifier includes a first linear amplifier and a second linear amplifier, the first and second linear amplifiers have having an output offset voltage at half the supply voltage.

12. A resolver circuit comprising:

a signal generation circuit configured to generate an excitation signal;

a bridge tied load amplifier having an input in electrical communication with the signal generation circuit;

a resolver having an excitation winding in electrical communication with the bridge tied load amplifier; and

a resolver processing circuit in electrical communication with a first output winding of the resolver, wherein the bridge tied load amplifier includes a first linear amplifier and a second linear amplifier, the second linear amplifier having an inverted output in communication with a negative output of the bridge tied load amplifier.

Assignments (6)
RELEASE BY SECURED PARTY AGAINST SECURITY INTEREST IN PATENTS RECORDED AT REEL 022575 FRAME 0186 Recorded Oct 7, 2010
From: WILMINGTON TRUST FSB, AS ADMINISTRATIVE AGENT
To: VISTEON GLOBAL TECHNOLOGIES, INC.
Reel/Frame 025105/0201 →
ASSIGNMENT OF SECURITY INTEREST IN PATENTS Recorded Apr 21, 2009
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: WILMINGTON TRUST FSB, AS ADMINISTRATIVE AGENT
Reel/Frame 022575/0186 →
SECURITY INTEREST Recorded Feb 27, 2009
From: VISTEON GLOBAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK
Reel/Frame 022368/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 13, 2008
From: VISTEON GLOBAL TECHNOLOGIES, INC.
To: TEDRIVE HOLDING B.V., INC.
Reel/Frame 021669/0774 →
SECURITY AGREEMENT Recorded Feb 7, 2008
From: VISTEON GLOBAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 020497/0733 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 15, 2004
From: KHAYKIN, BORIS L.; MULLIGAN, DAVID R.
To: VISTEON GLOBAL TECHNOLOGIES, INC.
Reel/Frame 015097/0815 →