IP Library Granted Patent US 6,929,485
Granted Patent B1
US 6,929,485 · App. 10/801,512 · Granted Aug 16, 2005

Lead frame with interdigitated pins

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Quick Facts
Patent No.
US 6,929,485
App. No.
10/801,512
Granted
Aug 16, 2005
Kind
B1
Abstract

A lead frame includes pins for a plurality of parts. The pins for the plurality of the parts include first pins for a first part and first pins for a second part. The first pins for the first part include first shaped pins and second shaped pins. Each of the first shaped pins has a wide area of a first length, and a narrow area. Each of the second shaped pins has a wide area of a second length and a narrow area. The first length and the second length are not equal. The first pins for the first part are interdigitated with the first pins for the second part.

Claims (61)

1. A lead frame comprising:

pins for a plurality of parts, the pins comprising:

first pins for a first part, the first pins for the first part including:

first shaped pins, each of the first shaped pins having a wide area of a first length, and a narrow area, and

second shaped pins, each of the second shaped pins having a wide area of a second length and a narrow area, wherein the first length and the second length are not equal, and

first pins for a second part;

wherein the first pins for the first part are interdigitated with the first pins for the second part.

2. A lead frame as in claim 1 wherein the first pins for the second part include:

first shaped pins for the second part, each of the first shaped pins for the second part having a wide area of the first length, and a narrow area; and,

second shaped pins for the second part, each of the second shaped pins for the second part having a wide area of the second length and a narrow area.

3. A lead frame as in claim 2 :

wherein the first length is longer than the second length; and,

wherein the first pins for the first part are interdigitated with the first pins for the second part so that none of the first shaped pins for the first part are immediately adjacent to any of the first shaped pins for the second part.

4. A lead frame as in claim 1 wherein the first length is longer than the second length and the first shaped pins have lesser inductance than the second shaped pins.

5. A lead frame as in claim 1 , wherein the pins for the plurality of parts additionally comprise:

second pins for the first part; and,

first pins for a third part;

wherein the second pins for the first part are interdigitated with the first pins for the third part.

6. A lead frame as in claim 5 wherein the second pins for the first part include:

third shaped pins for the first part, each of the third shaped pins for the first part having a wide area of the first length, and a narrow area; and,

fourth shaped pins for the first part, each of the fourth shaped pins for the first part having a wide area of the second length and a narrow area.

7. A lead frame as in claim 6 wherein the first pins for the third part include:

first shaped pins for the third part, each of the first shaped pins for the third part having a wide area of the first length, and a narrow area; and,

second shaped pins for the third part, each of the second shaped pins for the third part having a wide area of the second length and a narrow area.

8. A lead frame as in claim 7 :

wherein the first length is longer than the second length; and,

wherein the second pins for the first part are interdigitated with the first pins for the third part so that none of the third shaped pins for the first part are immediately adjacent to any of the first shaped pins for the third part.

9. A lead frame as in claim 5 , wherein the pins for the plurality of parts additionally comprise:

second pins for the second part; and,

first pins for a fourth part;

wherein the second pins for the second part are interdigitated with the first pins for the fourth part.

10. A method for constructing a lead frame comprising:

forming pins for a plurality of parts, including the following;

forming first pins for a first part, including:

forming first shaped pins, each of the first shaped pins having a wide area of a first length, and a narrow area, and

forming second shaped pins, each of the second shaped pins having a wide area of a second length and a narrow area, wherein the first length and the second length are not equal, and

forming first pins for a second part, wherein the first pins for the first part are interdigitated with the first pins for the second part.

11. A method as in claim 10 wherein forming the first pins for the second part include:

forming first shaped pins for the second part, each of the first shaped pins for the second part having a wide area of the first length, and a narrow area; and,

forming second shaped pins for the second part, each of the second shaped pins for the second part having a wide area of the second length and a narrow area.

12. A method as in claim 10 :

wherein the first length is longer than the second length; and,

wherein the first pins for the first part are interdigitated with the first pins for the second part so that none of the first shaped pins for the first part are immediately adjacent to any of the first shaped pins for the second part.

13. A method as in claim 10 wherein the first length is longer than the second length and the first shaped pins have lesser inductance than the second shaped pins.

14. A method as in claim 10 , wherein forming the pins for the plurality of parts additionally comprises:

forming second pins for the first part; and,

forming first pins for a third part;

wherein the second pins for the first part are interdigitated with the first pins for the third part.

15. A method as in claim 14 wherein forming the second pins for the first part includes:

forming third shaped pins for the first part, each of the third shaped pins for the first part having a wide area of the first length, and a narrow area; and,

forming fourth shaped pins for the first part, each of the fourth shaped pins for the first part having a wide area of the second length and a narrow area.

16. A method as in claim 15 wherein forming the first pins for the third part include:

forming first shaped pins for the third part, each of the first shaped pins for the third part having a wide area of the first length, and a narrow area; and,

forming second shaped pins for the third part, each of the second shaped pins for the third part having a wide area of the second length and a narrow area.

17. A method as in claim 16 :

wherein the first length is longer than the second length; and,

wherein the second pins for the first part are interdigitated with the first pins for the third part so that none of the third shaped pins for the first part are immediately adjacent to any of the first shaped pins for the third part.

18. A method as in claim 14 , wherein forming the pins for the plurality of parts additionally comprise:

forming second pins for the second part; and,

forming first pins for a fourth part;

wherein the second pins for the second part are interdigitated with the first pins for the fourth part.

Assignments (9)
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NAME OF THE ASSIGNEE PREVIOUSLY RECORDED ON REEL 017207 FRAME 0020. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded May 6, 2016
From: AGILENT TECHNOLOGIES, INC.
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 038633/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032851-0001) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 037689/0001 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032851/0001 →
RELEASE OF SECURITY INTEREST Recorded May 15, 2013
From: CITICORP NORTH AMERICA, INC.
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 030420/0048 →
SECURITY AGREEMENT Recorded Feb 24, 2006
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: CITICORP NORTH AMERICA, INC.
Reel/Frame 017207/0882 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 22, 2006
From: AGILENT TECHNOLOGIES, INC.
To: AVAGO TECHNOLOGIES GENERAL IP PTE. LTD.
Reel/Frame 017207/0020 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 15, 2004
From: LEONG, AK WING; BROSNAN, MICHAEL J.
To: AGILENT TECHNOLOGIES, INC.
Reel/Frame 014857/0563 →