IP Library Granted Patent US 6,924,233
Granted Patent B1
US 6,924,233 · App. 10/804,759 · Granted Aug 2, 2005

Phosphor deposition methods

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Quick Facts
Patent No.
US 6,924,233
App. No.
10/804,759
Granted
Aug 2, 2005
Kind
B1
Abstract

Methods of coating a semiconductor device with phosphor particles are disclosed. In the methods, a bath is provided which contains suspended particles of a first phosphor material and suspended particles of a second phosphor material. The particles of the first phosphor material have a mean particle size in the range from about 1 micron to about 6 microns, and the particles of the second phosphor material have a mean particle size in the range from about 12 microns to about 25 microns, wherein the particle size distribution of the phosphor material in the bath is bimodal. The semiconductor device is disposed in the bath containing the suspended particles, and a first biasing voltage is applied between an anode in electrical contact with the bath and the p side to hold the anode at a positive voltage with respect to the p side. A second biasing voltage is applied between the p side and the n side. In particular embodiments, the method results in a substantially conformal coating of the phosphor particles being deposited on at least one surface of the semiconductor structure.

Claims (36)

1. A method for coating a semiconductor device, the semiconductor device having a p side and an n side, the method comprising:

a) providing a bath containing suspended particles, the suspended particles comprising particles of a first phosphor material and particles of a second phosphor material, the particles of the first phosphor material having a mean particle size in the range from about 1 micron to about 6 microns, the particles of the second phosphor material having a mean particle size in the range from about 12 microns to about 25 microns, wherein the particle size distribution of the phosphor material in the bath is bimodal,

b) positioning a semiconductor device in the bath,

c) applying a first biasing voltage between an anode in electrical contact with the bath and the p side to hold the anode at a positive voltage with respect to the p side,

d) applying a second biasing voltage between the p side and the n side.

2. The method of claim 1 wherein the semiconductor device is selected from the group consisting of a light emitting diode (LED), an electroluminescent device, a laser diode, a pnp transistor, an npn transistor, a Charge-Coupled Device CCD, a CMOS imager, an amorphous silicon device, an X-ray imager, a photo-transistor, a semiconductor, and a semiconductor device array.

3. The method of claim 1 wherein the first phosphor material has a particle size distribution such that the span of particle diameters from the 25th volume percentile to the 75th volume percentile is in the range from about 2 microns to about 6 microns.

4. The method of claim 1 wherein the second phosphor material has a particle size distribution such that the span of particle diameters from the 25th volume percentile to the 75th volume percentile is in the range from about 2 microns to about 10 microns.

5. The method of claim 1 wherein the suspended particles further comprise one or more of the group consisting of optical materials, high resistivity dielectric materials, silica, titanium dioxide, and a third phosphor material.

6. The method of claim 1 wherein the second biasing voltage is selected from the group consisting of reverse bias, zero bias, and forward bias.

7. The method of claim 1 wherein applying a second biasing voltage between the p side and the n side further comprises applying a second biasing voltage switchable between a reverse bias, a zero bias, and a forward bias.

8. The method of claim 1 wherein applying a second biasing voltage between the p side and the n side comprises applying a voltage between the anode and the n side.

9. The method of claim 1 further comprising pre-coating the semiconductor device.

10. The method of claim 9 wherein pre-coating the semiconductor device comprises pre coating the semiconductor device with a high resistivity dielectric material coating.

11. The method of claim 1 wherein applying a second biasing voltage between the p side and the n side further comprises applying a second biasing voltage between the p side and the n side to cause the semiconductor device to emit light, the light ionizing the bath.

12. The method of claim 1 , wherein at least one of the group consisting of the first phosphor material and the second phosphor material comprises a material selected from SrS:Eu 2+ ; CaS:Eu 2+ ; CaS:Eu 2+ ,Mn 2+ ; (Zn,Cd)S:Ag + ; Mg 4 GeO 5.5 F:Mn 4+ ; and ZnS:Mn 2+ .

13. The method of claim 1 , wherein at least one of the group consisting of the first phosphor material and the second phosphor material comprises a material selected from SrGa2S4:Eu2+ and ZnS:Cu,Al.

14. The method of claim 1 , wherein at least one of the group consisting of the first phosphor material and the second phosphor material comprises (Y,Gd) 3 Al 5 O 12 :Ce,Pr.

15. A method for coating a light emitting diode, the light emitting diode having a p side and an n side, the method comprising:

a) providing a bath containing suspended phosphor particles, the suspended phosphor particles comprising particles of a first phosphor material and particles of a second phosphor material, the particles of the first phosphor material having a mean particle size in the range from about 1 micron to about 6 microns, the particles of the second phosphor material having a mean particle size in the range from about 12 microns to about 25 microns, wherein the particle size distribution of the phosphor material in the bath is bimodal,

b) positioning a light emitting diode in the bath,

c) applying a first biasing voltage between an anode in electrical contact with the bath and the p side to hold the anode at a positive voltage with respect to the p side,

d) applying a second biasing voltage between the p side and the n side.

16. The method of claim 15 , wherein said phosphor particles are capable of absorbing light from the diode and emitting light having a longer wavelength than the light from the diode such that the combination of light emitted from the diode and light emitted from the phosphor particles appears white to the human eye.

17. The method of claim 15 , wherein the bath further comprise one or more of the group consisting of optical materials, high resistivity dielectric materials, silica, titanium dioxide, a third phosphor material, an electrolyte, and a binder material.

18. The method of claim 15 , wherein the first phosphor material has a particle size distribution such that the span of particle diameters from the 25th volume percentile to the 75th volume percentile is in the range from about 2 microns to about 6 microns.

19. The method of claim 15 , wherein the second phosphor material has a particle size distribution such that the span of particle diameters from the 25th volume percentile to the 75th volume percentile is in the range from about 2 microns to about 10 microns.

20. The method of claim 15 wherein the second biasing voltage is selected from the group consisting of reverse bias, zero bias, and forward bias.

21. The method of claim 15 wherein applying a second biasing voltage between the p side and the n side further comprises applying a second biasing voltage switchable between a reverse bias, a zero bias, and a forward bias.

22. The method of claim 15 wherein applying a second biasing voltage between the p side and the n side comprises applying a voltage between the anode and the n side.

23. The method of claim 22 wherein applying a second biasing voltage between the p side and the n side further comprises switching the second biasing voltage between a reverse bias, a zero bias, and a forward bias.

24. The method of claim 15 further comprising pre coating the light emitting diode with silica.

25. The method of claim 15 further comprising masking the light emitting diode.

26. The method of claim 15 , wherein at least one of the group consisting of the first phosphor material and the second phosphor material comprises a material selected from SrS:Eu 2+ ; CaS:Eu 2+ ; CaS:Eu 2+ ,Mn 2+ ; (Zn,Cd)S:Ag + ; Mg 4 GeO 5.5 F:Mn 4+ ; and ZnS:Mn 2+ .

27. The method of claim 15 , wherein at least one of the group consisting of the first phosphor material and the second phosphor material comprises a material selected from SrGa 2 S4:Eu 2+ and ZnS:Cu,Al.

28. The method of claim 15 , wherein at least one of the group consisting of the first phosphor material and the second phosphor material comprises (Y,Gd) 3 Al 5 O 12 :Ce,Pr.

Assignments (9)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 25, 2018
From: INTELLECTUAL DISCOVERY CO., LTD.
To: BENCH WALK LIGHTING LLC
Reel/Frame 047308/0798 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 21, 2017
From: SUMMERS, CHRISTOPHER J; MENKARA, HISHAM
To: INTELLECTUAL DISCOVERY CO., LTD.
Reel/Frame 044466/0996 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NAME OF THE ASSIGNEE PREVIOUSLY RECORDED ON REEL 017207 FRAME 0020. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded May 6, 2016
From: AGILENT TECHNOLOGIES, INC.
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 038633/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 17, 2012
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.; AVAGO TECHNOLOGIES ECBU IP (SINGAPORE) PTE. LTD.; AVAGO TECHNOLOGIES FIBER IP (SINGAPORE) PTE. LTD.
To: INTELLECTUAL DISCOVERY CO., LTD.
Reel/Frame 028972/0733 →
RELEASE OF SECURITY INTEREST Recorded May 11, 2012
From: CITICORP NORTH AMERICA, INC.
To: AVAGO TECHNOLOGIES ECBU IP (SINGAPORE) PTE. LTD., SUCCESSOR IN INTEREST TO AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 028197/0334 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 25, 2006
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES ECBU IP (SINGAPORE) PTE. LTD.
Reel/Frame 017675/0518 →
SECURITY AGREEMENT Recorded Feb 24, 2006
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: CITICORP NORTH AMERICA, INC.
Reel/Frame 017207/0882 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 22, 2006
From: AGILENT TECHNOLOGIES, INC.
To: AVAGO TECHNOLOGIES GENERAL IP PTE. LTD.
Reel/Frame 017207/0020 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 24, 2004
From: CHUA, JANET BEE YIN; AHMED, ZALIDA; SUMMERS, CHRISTOPHER J.; MENKARA, HISHAM
To: AGILENT TECHNOLOGIES, INC.
Reel/Frame 014775/0068 →