IP Library Granted Patent US 7,122,838
Granted Patent B2
US 7,122,838 · App. 10/804,807 · Granted Oct 17, 2006

Solid-state imaging device

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Quick Facts
Patent No.
US 7,122,838
App. No.
10/804,807
Granted
Oct 17, 2006
Kind
B2
Abstract

A solid-state imaging device is provided, in which both a reduction in a read voltage and enhancement of a transfer efficiency are satisfied. A p type well 507 is formed on an n type semiconductor substrate 506 , and a CCD channel region 102 is formed on a surface region of the p type well 507 . A gate insulating film 510 is formed on a surface of the CCD channel region 102 , and first electric charge transfer electrodes 503 are formed on the gate insulating film 510 . An interlayer insulating film 511 is formed on circumferences of the first electric charge transfer electrodes, and second electric charge transfer electrodes 504 are formed between the first electric charge transfer electrodes on the gate insulating film 510 . An electrode length L1 of the second electric charge transfer electrodes 504 is longer than an electrode length L2 of the first electric charge transfer electrodes 503 , and n − type potential level difference regions 113 are formed in upstream side portions of the CCD channel region under the second electric charge transfer electrodes 504 by p type impurity implantation.

Claims (15)

1. A solid-state imaging device, comprising:

a plurality of second conductivity photoelectric converting regions formed on a surface region of a first conductivity semiconductor substrate or a first conductivity well;

a second conductivity CCD channel region provided adjacent to the photoelectric converting regions;

a first conductivity electric charge reading region provided between the photoelectric converting region and the CCD channel region;

a first conductivity device separation region provided on circumferences of the photoelectric converting regions excluding the reading region;

a plurality of first electric charge transfer electrodes provided on the CCD channel region; and

second electric charge transfer electrodes provided between the plurality of first electric charge transfer electrodes,

wherein the second electric charge transfer electrodes have an electrode length in an electric charge transfer direction longer than that of the first electric charge transfer electrodes, and function as an electric charge reading gate for reading electric charge from the photoelectric converting regions, and in the CCD channel region under the second electric charge transfer electrodes, a potential gradient deepening in the electric charge transfer direction is provided.

2. The solid-state imaging device according to claim 1 , wherein a first conductivity impurity is implanted into an upstream side portion in the electric charge transfer direction of the second conductivity CCD channel region under the second electric charge transfer electrodes, whereby at least one step of potential level difference is provided.

3. The solid-state imaging device according to claim 2 , wherein the first electric charge transfer electrodes are formed of a first electrode film layer, and one end of a region where the first conductivity impurity is implanted is formed in a self-alignment manner with respect to an end of the first electric charge transfer electrode.

4. The solid-state imaging device according to claim 1 , wherein a second conductivity impurity is implanted into a downstream side portion in the electric charge transfer direction of the second conductivity CCD channel region under the second electric charge transfer electrodes, whereby at least one step of potential level difference is provided.

5. The solid-state imaging device according to claim 4 , wherein the first electric charge transfer electrodes are formed of a first electrode film layer, and one end of a region where the second conductivity impurity is implanted is formed in a self-alignment manner with respect to an end of the first electric charge transfer electrode.

6. The solid-state imaging device according to claim 1 , wherein in the second conductivity CCD channel region under the second electric charge transfer electrodes, a first conductivity impurity is implanted into an upstream side portion in the electric charge transfer direction, and a second conductivity impurity is implanted into a downstream side portion in the electric charge transfer direction, whereby at least two steps of potential level differences are provided.

7. The solid-state imaging device according to claim 6 , wherein the first electric charge transfer electrodes are formed of a first electrode film layer, and one end of a region where the first conductivity impurity and the second conductivity impurity are implanted is formed in a self-alignment manner with respect to an end of the first electric charge transfer electrode.

8. The solid-state imaging device according to claim 1 , wherein an upstream side portion in the electric charge transfer direction of the first electric charge transfer electrodes on the CCD channel region is positioned in a gap between the photoelectric converting regions adjacent to each other in the electric charge transfer direction.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2020
From: PANASONIC CORPORATION
To: PANASONIC SEMICONDUCTOR SOLUTIONS CO., LTD.
Reel/Frame 052755/0917 →
CHANGE OF NAME Recorded Mar 18, 2020
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 052184/0943 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 19, 2004
From: YAMADA, TOHRU
To: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Reel/Frame 015123/0408 →