IP Library Granted Patent US 7,545,416
Granted Patent B2
US 7,545,416 · App. 10/805,194 · Granted Jun 9, 2009

Image processing device and camera including CPU which determines whether processing performed using external memory

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Quick Facts
Patent No.
US 7,545,416
App. No.
10/805,194
Granted
Jun 9, 2009
Kind
B2
Abstract

An image processing device for performing image processing for an image signal output from an image sensor and outputting the results, including: an internal memory having line memories for storing an image by row or column; an image processing section for performing the image processing using the internal memory; and a CPU for controlling the image processing section. The image processing section includes a plurality of processing circuits each performing predetermined processing as the image processing. At least one of the plurality of processing circuits is configured to allow use of an external memory provided outside the image processing device as required.

Claims (21)

1. An image processing device for performing image processing for an image signal output from an image sensor and outputting the results, comprising:

an internal memory having line memories for storing an image by row or column as a unit;

an image processing section for performing the image processing using the internal memory; and

a CPU for controlling the image processing section,

wherein the image processing section includes a plurality of processing circuits each performing predetermined processing as the image processing, and

the CPU determines whether or not each predetermined processing is performed with use of an external memory, and switches between a first processing mode using only the internal memory and a second processing mode using the internal and/or external memory based on said determination.

2. The device of claim 1 , the image processing section performs given processing as the image processing without use of the external memory when the given processing can be performed without use of the external memory.

3. The device of claim 1 , wherein the CPU outputs a control signal for reducing power consumed by the external memory when the image processing section does not use the external memory.

4. The device of claim 1 , wherein the image processing section includes as the plurality of processing circuits:

a luminance/color-difference signal processing circuit for converting the image signal obtained from the image sensor to a luminance signal and a color-difference signal and outputting the converted signals; and

a compression circuit for performing compression coding of an image corresponding to the output of the luminance/color-difference signal processing circuit and outputting the results as an output of the image processing section.

5. The device of claim 1 , wherein the image processing section includes an on-screen display processing circuit for superimposing an image read from the external memory on the image obtained from the image sensor and outputting the results.

6. The device of claim 1 , wherein one of the plurality of processing circuits stores a processed image into the external memory sequentially by row or column as a unit, and

another one of the plurality of processing circuits reads the image stored in the external memory by column or row as a unit whichever different from the unit used during the storing of the image.

7. The device of claim 1 , wherein at least two of the plurality of processing circuits perform processing using the same internal memory.

8. The device of claim 1 , wherein the image processing section stores the image output from the image sensor into the external memory, reads the stored image from the external memory by row or column as a unit whichever has a smaller number of pixels, performs the image processing for the read data using the internal memory, stores the results into an area of the external memory in which the corresponding pixel data had been stored before being read, and reads the resultant image from the external memory to be output.

9. The device of claim 8 , wherein the image processing section divides the image into a plurality of areas if the number of pixels of each row or column of the image whichever is smaller exceeds the number of pixels allowed to be stored in the internal memory.

10. A camera comprising:

the image processing device of claim 4 ;

an image sensor for outputting an image signal to the image processing device; and

a recording device for writing an output of the image processing device into a recording medium.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2020
From: PANASONIC CORPORATION
To: PANASONIC SEMICONDUCTOR SOLUTIONS CO., LTD.
Reel/Frame 052755/0917 →
CHANGE OF NAME Recorded Nov 24, 2008
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 021897/0653 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 22, 2004
From: SHIMAZU, YOSHIHISA; TSUMURA, KEIICHI; IWASAWA, TAKAHIRO; MINAKATA, NOBUYUKI; HIRAYAMA, TAKESHI
To: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Reel/Frame 015129/0043 →