Bias circuit for providing a constant bias current to a power amplifier
View Patent ↗A power amplifier for use in a mobile handset includes an amplifying transistor, a bias circuit including a bias transistor, the bias circuit providing a bias current to bias the amplifying transistor, and a bias current control circuit, responsive to fluctuation in a reference voltage and variation in temperature, for adjusting the bias current to control an operation current of the amplifying transistor.
1. A power amplifier, comprising:
an amplifying transistor;
a bias circuit including a bias transistor, the bias circuit providing a bias current to bias the amplifying transistor; and
a bias current control circuit, responsive to fluctuation in a reference voltage and variation in temperature, for adjusting the bias current to control an operation current in the amplifying transistor,
wherein the bias circuit further includes a first resistor having a first and a second end thereof, the first end being supplied with the reference voltage and the second end being connected to a base of the bias transistor, and wherein the bias current control circuit includes:
a first diode having a cathode and an anode thereof, the first diode being made of a bipolar junction transistor, whose collector and base are connected to each other;
a second diode having a cathode and an anode thereof, the second diode being made of a bipolar junction transistor whose collector and base are connected to each other, the cathode of the second diode being grounded, and the anode of the second diode being connected to the cathode of the first diode;
a second resistor having a first and a second end thereof, the first end of the second resistor being supplied with the reference voltage and the second end of the second resistor being connected to the anode of the first diode; and
a control transistor, an emitter thereof being grounded and a base thereof being connected to the anode of the second diode and a collector thereof being connected to a node P between the second end of the first resistor and the base of the bias transistor.
2. The power amplifier of claim 1 , wherein, if the reference voltage increases, a collector current of the control transistor increases, and, if otherwise, the collector current of the control transistor decreases to thereby maintain a voltage Vp at the node P substantially constant.
3. The power amplifier of claim 1 , wherein, if temperature rises, a collector current of the control transistor increases, and, if otherwise, the collector current of the control transistor decreases to thereby compensate fluctuations in a voltage Vp at the node P.
4. The power amplifier of claim 2 , wherein a voltage fluctuation ΔVp at the node P can be calculated as follows:
Δ
Vp
=
V
′
p
-
Vp
≅
±
Δ
Vref
∓
Δ
Vref
R2
R1
,
wherein the V′p is a voltage at the node P when the reference voltage is fluctuated, the ΔVref is a fluctuation in the reference voltage, R 1 is the second resistor and R 2 is the first resistor.
5. The power amplifier of claim 3 , wherein a voltage fluctuation ΔVP at the node P can be calculated as follows:
Δ
Vp
≅
∓
(
Δ
V
BE1
+
Δ
V
BE2
)
R2
R1
,
wherein the ΔV BE1 is a turn-on voltage fluctuation in the amplifying transistor, ΔV BE2 is a turn-on voltage fluctuation in the bias transistor, R 1 is the second resistor and R 2 is the first resistor.
6. A power amplifier, comprising:
an amplifying transistor;
a bias circuit including a bias transistor, an emitter thereof being connected to a base of the amplifying transistor, and the bias transistor providing an emitter current as a bias current to bias the amplifying transistor; and
a bias current control circuit for maintaining an operation current substantially constant in the amplifying transistor by controlling a base voltage of the bias transistor to provide a constant emitter current to the base of the amplifying transistor regardless of fluctuation in a reference voltage and variation in temperature.
7. The power amplifier of claim 6 , wherein if the reference voltage fluctuates, the bias current control circuit maintains the base voltage of the bias transistor substantially constant, and, if the temperature varies, the bias current control circuit compensates fluctuations in the base voltage of the bias transistor.
8. The power amplifier of claim 6 , wherein the bias circuit further includes a first resistor having a first and a second end thereof, the first end being supplied with the reference voltage and the second end being connected to a base of the bias transistor.
9. The power amplifier of claim 8 , wherein the bias current control circuit includes:
a first diode having a cathode and an anode thereof, the first diode being made of a bipolar junction transistor, whose collector and base are connected to each other;
a second diode having a cathode and an anode thereof, the second diode being made of a bipolar junction transistor whose collector and base are connected to each other, the cathode of the second diode being grounded, and the anode of the second diode being connected to the cathode of the first diode;
a second resistor having a first and a second end thereof, the first end of the second resistor being supplied with the reference voltage and the second end of the second resistor being connected to the anode of the first diode; and
a control transistor, an emitter thereof being grounded and a base thereof being connected to the anode of the second diode and a collector thereof being connected to a node P between the second end of the first resistor and the base of the bias transistor.
10. The power amplifier of claim 9 , wherein, if the reference voltage increases, a collector current of the control transistor increases, and, if otherwise, the collector current of the control transistor decreases to thereby maintain a voltage Vp at the node P substantially constant.
11. The power amplifier of claim 9 , wherein, if temperature rises, a collector current of the control transistor increases, and, if otherwise, the collector current of the control transistor decreases to thereby compensate fluctuations in a voltage Vp at the node P.
12. The power amplifier of claim 10 , wherein a voltage fluctuation ΔVp at the node P can be calculated as follows:
Δ
Vp
=
V
′
p
-
Vp
≅
±
Δ
Vref
∓
Δ
Vref
R2
R1
,
wherein the V′p is a voltage at the node P when the reference voltage is fluctuated, the ΔVref is a fluctuation in the reference voltage, R 1 is the second resistor and R 2 is the first resistor.
13. The power amplifier of claim 11 , wherein a voltage fluctuation ΔVp at the node P can be calculated as follows:
Δ
Vp
≅
∓
(
Δ
V
BE1
+
Δ
V
BE2
)
R2
R1
,
wherein the ΔV BE1 is a turn-on voltage fluctuation in the amplifying transistor, ΔV BE2 is a turn-on voltage fluctuation in the bias transistor, R 1 is the second resistor and R 2 is the first resistor.