IP Library Granted Patent US 7,170,435
Granted Patent B2
US 7,170,435 · App. 10/810,053 · Granted Jan 30, 2007

Method for operating an analog to digital converter

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Quick Facts
Patent No.
US 7,170,435
App. No.
10/810,053
Granted
Jan 30, 2007
Kind
B2
Abstract

Binary indications are converted to an analog representation with significant reduction in ringing at the transitions between successive binary indications and in the period during each binary indication. The binary indications are disposed in a row-and-column matrix to provide a thermometer code. Each stage of the converter includes a decoder and latch arranged so the decoder inputs settle before the latch is set by the clock pulses. The stages are implemented in complementary CMOS. Complementary transistors are biased so one transistor of the pair is driven to the rail while the other transistor of the pair floats. A dummy CMOS transistor is used to balance the number of transistors in the decoder paths.

Claims (11)

1. A method of operating a digital to analog converter (DAC) comprising:

coupling to a matrix of DAC cells a plurality of binary indications that represent a digital value, the binary indications changing at regular intervals;

sampling the DAC cells between the regular intervals after the binary indications change, including connecting each DAC cell to a block actuated switch between a current source and the output of the DAC; and

latching the cells between the regular intervals.

2. The method of claim 1 , additionally comprising forming the cells from different “anded” combinations of states of the binary indications.

3. The method of claim 2 , in which the “anded” combinations are directly connected to respective clock actuated switches.

4. A method of operating a digital to analog converter (DAC) that receives a plurality of digital value representative binary indications, the method comprising:

forming a matrix of DAC cells from different “anded” combinations of states of the binary indications;

connecting each DAC cell directly to a sampling switch;

closing the sampling switches responsive to clock pulses; and

latching the cells after each clock pulse.

Assignments (3)
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →