IP Library Granted Patent US 7,129,648
Granted Patent B2
US 7,129,648 · App. 10/810,727 · Granted Oct 31, 2006

Interface circuit for operating capacitive loads

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Quick Facts
Patent No.
US 7,129,648
App. No.
10/810,727
Granted
Oct 31, 2006
Kind
B2
Abstract

An interface circuit suitable for operating capacitive loads such as electric ballasts for lamps at a mains supply circuit, in particular a phase gating dimmer. The interface circuit short-circuits the load input if the mains supply circuit does not carry out a load supply.

Claims (7)

1. An interface circuit for operating a capacitive load from a mains supply circuit, the interface circuit comprising:

a first transistor coupled across an input of the load and operable to activate and thereby effectively short-circuit a supply input of the load, wherein the first transistor includes a base; and

a second transistor coupled to the base of the first transistor, and operable to selectively deactivate the first transistor, wherein the second transistor includes a base that is coupled to a respective mains-side input of a rectifier via a first and a second resistor.

2. An interface circuit for operating a capacitive load from a mains supply circuit, the interface circuit comprising:

a first transistor coupled across an input of the load and operable to activate and thereby effectively short-circuit a supply input of the load, wherein the first transistor includes a base;

a second transistor coupled to the base of the first transistor, and operable to selectively deactivate the first transistor, wherein the second transistor includes a base that is coupled to a respective mains-side input of a rectifier via a first and a second resistor; and

a control circuit operable to evaluate a signal generated by the mains supply circuit to generate a signal for controlling power consumption of the load, wherein the control circuit includes parallel circuit, a smoothing capacitor, a fourth resistor, and a fifth resistor, wherein the a parallel circuit is a series circuit comprising a third resistor and a third transistor, the third transistor including a base which is connected to the base of the first transistor, the parallel circuit being connected in series with the fifth resistor, wherein a tap of the control signal for controlling power consumption of the load is provided between the fourth resistor and the fifth resistor.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 23, 2022
From: ACUITY BRANDS LIGHTING, INC.
To: ABL IP HOLDING LLC
Reel/Frame 059220/0139 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 11, 2022
From: OSRAM GMBH
To: ACUITY BRANDS LIGHTING, INC.
Reel/Frame 058689/0898 →
MERGER Recorded Jun 22, 2021
From: PATENT-TREUHAND-GESELLSCHAFT FUER ELECTRISCHE GLUEHLAMPEN MBH
To: OSRAM GESELLSCHAFT MIT BESCHRAENKTER HAFTUNG
Reel/Frame 056703/0808 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 29, 2004
From: FISCHER, KLAUS; KREITTMAYR, JOSEF
To: PATENT-TREUHAND-GESELLSCHAFT FUR ELEKTRISCH GLUHLAMPEN MBH
Reel/Frame 015157/0943 →