Closed-loop high voltage booster
View Patent ↗A voltage boosting circuit with a closed-loop control mechanism and a controllable slew rate. A tracking capacitor and a control current form the closed-loop and are used to adjust the slew rate of the boosting circuit. The closed-loop control and adjustable slew rate improve the accuracy and predictability of the boosting circuit's final boosted output voltage.
1. A voltage boosting circuit comprising:
a first circuit, said first circuit having a first input connected to a reference voltage and a first output; and
a second circuit connected to receive the first output and a pre-charge voltage, said second circuit outputting a boosted output voltage on an output node based on the pre-charge voltage and the first output, said second circuit having a second node connected to a second input of the first circuit, said first circuit using a voltage on the second node and the reference voltage to generate the first output,
wherein said second circuit comprises a tracking capacitor connected between the output and second nodes, said tracking capacitor producing the voltage at the second node.
2. The voltage boosting circuit of claim 1 , wherein the voltage on said second node is indicative of the boosted output voltage.
3. The voltage boosting circuit of claim 1 , wherein the voltage on said second node is indicative of a difference between the boosted output voltage and the pre-charge voltage.
4. The voltage boosting circuit of claim 1 , wherein the first output is a current based on a difference between the boosted output voltage and the reference voltage.
5. A voltage boosting circuit comprising:
a first circuit, said first circuit having a first input connected to a reference voltage and a first output; and
a second circuit connected to receive the first output and a pre-charge voltage, said second circuit outputting a boosted output voltage on an output node based on the pre-charge voltage and the first output, said second circuit having a second node connected to a second input of the first circuit, said first circuit using a voltage on the second node and the reference voltage to generate the first output, said second circuit comprising a first capacitor connected between said pre-charge voltage and a third node connected to the first output and a second capacitor connected between the output node and the second node;
a first switch connected between the third node and a ground potential; and
a second switch connected between the second node and the ground potential,
wherein in a pre-charge phase, said switches are closed to allow the capacitors to be pre-charged to the pre-charge voltage.
6. The voltage boosting circuit of claim 5 , wherein in a boosting phase, said switches are open, preventing the capacitors from being pre-charged to the pre-charge voltage, said first capacitor being boosted by the first output to cause the boosted output voltage to be present at said output node.
7. A voltage boosting circuit comprising:
a first circuit, said first circuit having a first input connected to receive a reference voltage, said first circuit having a first output; and
a second circuit connected to receive the first output and a pre-charge voltage, said second circuit adapted to output a boosted output voltage on an output node based on a received pre-charge voltage and first output, said second circuit having a second node connected to a second input of the first circuit, said first circuit being adapted to use a voltage on the second node and the reference voltage to generate the first output,
wherein said first circuit comprises a voltage-to-current converter circuit and said first output is a current based on a difference between the voltage on the second node and the reference voltage.
8. A voltage boosting circuit comprising:
a first circuit, said first circuit having a first input connected to receive a reference voltage, said first circuit having a first output; and
a second circuit connected to receive the first output and a pre-charge voltage, said second circuit adapted to output a boosted output voltage on an output node based on a received pre-charge voltage and first output, said second circuit having a second node connected to a second input of the first circuit, said first circuit being adapted to use a voltage on the second node and the reference voltage to generate the first output,
wherein said first circuit comprises:
a current source adapted to output a control current; and
a differential circuit having a first input connected to receive the reference voltage and a second input connected to receive the voltage at the second node, said differential circuit having a common-source output for said first output, said first output being controlled by the control current and having a value based on a difference between the voltage on the second node and the reference voltage.
9. The voltage boosting circuit of claim 8 , wherein said differential circuit comprises a differential transistor input pair.
10. The voltage boosting circuit of claim 8 , wherein said differential circuit comprises cascaded transistors.
11. The voltage boosting circuit of claim 8 , wherein said current source controls a rising time of the boosted output voltage.
12. A voltage boosting circuit comprising:
a first circuit, said first circuit having a first input connected to receive a reference voltage, said first circuit having a first output; and
a second circuit connected to receive the first output and a pre-charge voltage, said second circuit adapted to output a boosted output voltage on an output node based on a received pre-charge voltage and first output, said second circuit having a second node connected to a second input of the first circuit, said first circuit being adapted to use a voltage on the second node and the reference voltage to generate the first output,
wherein said first circuit comprises:
a current source outputting a control current; and
an integrator circuit having a first input connected to the reference voltage and a second input connected to the voltage at the second node, said first output being controlled by the control current and having a value based on a difference between the voltage on the second node and the reference voltage.
13. The voltage boosting circuit of claim 12 , wherein said current source controls a rising time of the boosted output voltage.
14. A pixel cell for an imager, said pixel cell comprising:
a first circuit element connected to a voltage; and
a voltage boosting circuit outputting said voltage to said first circuit element, said boosting circuit comprising:
a first circuit, said first circuit having a first input connected to a reference voltage and a first output; and
a second circuit connected to receive the first output and a pre-charge voltage, said second circuit outputting a boosted output voltage on an output node based on the pre-charge voltage and the first output, said second circuit having a second node connected to a second input of the first circuit, said first circuit using a voltage on the second node and the reference voltage to generate the first output,
wherein said first circuit comprises a voltage-to-current converter circuit and said first output is a current based on a difference between the voltage on the second node and the reference voltage.
15. The pixel cell of claim 14 , wherein the voltage on said second node is indicative of the boosted output voltage.
16. The pixel cell of claim 14 , wherein the voltage on said second node is indicative of a difference between the boosted output voltage and the pre-charge voltage.
17. The pixel cell of claim 14 , wherein the first output is a current based on a difference between the boosted output voltage and the reference voltage.
18. A pixel cell for an imager, said pixel cell comprising:
a first circuit element connected to a voltage line; and
a voltage boosting circuit adapted to output a voltage on the line to said first circuit element, said boosting circuit comprising:
a first circuit, said first circuit having a first input connected to receive a reference voltage, said first circuit having a first output; and
a second circuit connected to receive the first output and a pre-charge voltage, said second circuit adapted to output a boosted output voltage on an output node based on the pre-charge voltage and the first output, said second circuit having a second node connected to a second input of the first circuit, said first circuit adapted to use a voltage on the second node and the reference voltage to generate the first output,
wherein said second circuit comprises a tracking capacitor connected between the output and second nodes, said tracking capacitor producing the voltage at the second node.
19. A pixel cell for an imager, said pixel cell comprising:
a first circuit element connected to a voltage; and
a voltage boosting circuit outputting said voltage to said first circuit element, said boosting circuit comprising:
a first circuit, said first circuit having a first input connected to a reference voltage and a first output;
a second circuit connected to receive the first output and a pre-charge voltage, said second circuit outputting a boosted output voltage on an output node based on the pre-charge voltage and the first output, said second circuit having a second node connected to a second input of the first circuit, said first circuit using a voltage on the second node and the reference voltage to generate the first output, said second circuit comprising a first capacitor connected between said pre-charge voltage and a third node connected to the first output and a second capacitor connected between the output node and the second node;
a first switch connected between the third node and a ground potential; and
a second switch connected between the second node and the ground potential,
wherein in a pre-charge phase, said switches are closed to allow the capacitors to be pre-charged to the pre-charge voltage.
20. The pixel cell of claim 19 , wherein in a boosting phase, said switches are open, preventing the capacitors from being pre-charged to the pre-charge voltage, said first capacitor being boosted by the first output to cause the boosted output voltage to be present at said output node.
21. A pixel cell for an imager, said pixel cell comprising:
a first circuit element connected to a voltage; and
a voltage boosting circuit outputting said voltage to said first circuit element, said boosting circuit comprising:
a first circuit, said first circuit having a first input connected to a reference voltage and a first output; and
a second circuit connected to receive the first output and a pre-charge voltage, said second circuit outputting a boosted output voltage on an output node based on the pre-charge voltage and the first output, said second circuit having a second node connected to a second input of the first circuit, said first circuit using a voltage on the second node and the reference voltage to generate the first output, wherein said first circuit comprises:
a current source outputting a control current; and
a differential circuit having a first input connected to the reference voltage and a second input connected to the voltage at the second node, said differential circuit having a common-source output for said first output, said first output being controlled by the control current and having a value based on a difference between the voltage on the second node and the reference voltage.
22. The pixel cell of claim 21 , wherein said differential circuit comprises a differential transistor input pair.
23. The pixel cell of claim 21 , wherein said differential circuit comprises cascaded transistors.
24. The pixel cell of claim 21 , wherein said current source controls a rising time of the boosted output voltage.
25. A pixel cell for an imager, said pixel cell comprising:
a first circuit element connected to a voltage; and
a voltage boosting circuit outputting said voltage to said first circuit element, said boosting circuit comprising:
a first circuit, said first circuit having a first input connected to a reference voltage and a first output; and
a second circuit connected to receive the first output and a pre-charge voltage, said second circuit outputting a boosted output voltage on an output node based on the pre-charge voltage and the first output, said second circuit having a second node connected to a second input of the first circuit, said first circuit using a voltage on the second node and the reference voltage to generate the first output, wherein said first circuit comprises:
a current source outputting a control current; and
an integrator circuit having a first input connected to the reference voltage and a second input connected to the voltage at the second node, said first output being controlled by the control current and having a value based on a difference between the voltage on the second node and the reference voltage.
26. The pixel cell of claim 25 , wherein said current source controls a rising time of the boosted output voltage.
27. The pixel cell of claim 14 , wherein said first circuit element comprises a reset transistor.
28. The pixel cell of claim 14 , wherein said first circuit element comprises a row select transistor.
29. The pixel cell of claim 14 , wherein said first circuit element comprises a transfer transistor.
30. The pixel of claim 14 , wherein the boosted output voltage is a voltage source of the pixel.
31. An imager comprising:
a pixel cell, said pixel cell comprising a first circuit element connected to a boosted voltage, and a voltage boosting circuit outputting said boosted voltage to said first transistor, said boosting circuit comprising:
a first circuit, said first circuit having a first input connected to a reference voltage and a first output; and
a second circuit connected to receive the first output and a pre-charge voltage, said second circuit outputting a boosted output voltage on an output node based on the pre-charge voltage and the first output, said second circuit having a second node connected to a second input of the first circuit, said first circuit using a voltage on the second node and the reference voltage to generate the first output,
wherein said second circuit comprises a tracking capacitor connected between the output and second nodes, said tracking capacitor producing the voltage at the second node.
32. A method of manufacturing a voltage boosting circuit, said method comprising:
providing a voltage-to-current converter circuit;
connecting a first input of the voltage-to-current converter to a reference voltage;
providing a capacitive boosting circuit;
connecting an input of the capacitive boosting circuit to an output of the voltage-to-current converter circuit;
connecting the input of the capacitive boosting circuit to a pre-charge voltage source; and
connecting an output of the capacitive boosting circuit to a second input of the voltage-to-current converter circuit.
33. The method of claim 32 , wherein the capacitive boosting circuit comprises a tracking capacitor.
34. The method of claim 32 , wherein said step of providing a capacitive boosting circuit comprises:
providing a first capacitor connected between the pre-charge voltage source and a node connected to the output of the voltage-to-current converter; and
providing a second capacitor connected between an output node and a node connected to the second input of the voltage-to-current converter.
35. The method of claim 32 , wherein said step of providing a voltage-to-current converter comprises:
providing a current source outputting a control current; and
providing an integrator circuit having a first input connected to the reference voltage and a second input connected to the output of the capacitive boosting circuit.
36. The method of claim 32 , wherein said step of providing a voltage-to-current converter comprises: providing a current source outputting a control current; and
providing a differential circuit having a first input connected to the reference voltage and a second input connected to the output of the capacitive boosting circuit.